X9429 Datasheet, PDF (6/21 Pages) Intersil Corporation – Single Digitally Controlled Potentiometer

X9429
Acknowledge Polling
The disabling of the inputs, during the internal
nonvolatile write operation, can be used to take
advantage of the typical 5ms EEPROM write cycle
time. Once the stop condition is issued to indicate the
end of the nonvolatile write command the X9429
initiates the internal write cycle. ACK polling can be
initiated immediately. This involves issuing the start
condition followed by the device slave address. If the
X9429 is still busy with the write operation no ACK will
be returned. If the X9429 has completed the write
operation an ACK will be returned, and the master can
then proceed with the next operation.
Instruction Structure
The next byte sent to the X9429 contains the instruction
and register pointer information. The four most
significant bits are the instruction. The next four bits
point to one of four associated registers. The format is
shown below in Figure 2.
Figure 2. Instruction Byte Format
Register
Select
I3 I2 I1 I0 R1 R0 0 0
Instructions
Flow 1. ACK Polling Sequence
Nonvolatile Write
Command Completed
Enter ACK Polling
Issue
START
Issue Slave
Address
Issue STOP
ACK
NO
Returned?
YES
Further
NO
Operation?
YES
Issue
Instruction
Issue STOP
Proceed
Proceed
The four high order bits define the instruction. The
next two bits (R1 and R0) select one of the four
registers that is to be acted upon when a register
oriented instruction is issued. Bits 0 and 1 are defined
to be 0.
Four of the seven instructions end with the
transmission of the instruction byte. The basic
sequence is illustrated in Figure 3. These two-byte
instructions exchange data between the Wiper
Counter Register and one of the Data Registers. A
transfer from a Data Register to a Wiper Counter
Register is essentially a write to a static RAM. The
response of the wiper to this action will be delayed
t_WRL. A transfer from the Wiper Counter Register
(current wiper position), to a Data Register is a write to
nonvolatile memory and takes a minimum of t_WR to
complete.
Four instructions require a three-byte sequence to
complete. These instructions transfer data between the
host and the X9429; either between the host and one of
the Data Registers or directly between the host and the
Wiper Counter Register. These instructions are:
6
FN8248.2
October 19, 2005