X9421WV14IZ Datasheet, PDF (6/20 Pages) Intersil Corporation – Single Voltage Potentiometer

X9421
SERIAL DATA PATH
SERIAL
V_H
FROM INTERFACE
CIRCUITRY
BUS
INPUT
C
REGISTER 0
REGISTER 1
O
U
8
6
PARALLEL
BUS
INPUT
N
T
E
R
REGISTER 2
REGISTER 3
WIPER
D
COUNTER
E
REGISTER
C
(WCR)
O
D
E
INC/DEC
IF WCR = 00[H] THEN V_W = V_L
IF WCR = 3F[H] THEN V_W = V_H
UP/DN
LOGIC
UP/DN
MODIFIED SCK _CLK
V_L
FIGURE 1. DETAILED POTENTIOMETER BLOCK DIAGRAM
V_W
Write In Process
The contents of the Data Registers are saved to nonvolatile
memory when the CS pin goes from LOW to HIGH after a
complete write sequence is received by the device. The
progress of this internal write operation can be monitored by a
Write In Process bit (WIP). The WIP bit is read with a Read
Status command.
Instructions
Address/Identification (ID) Byte
The first byte sent to the X9421 from the host, following a CS
going HIGH to LOW, is called the Address or Identification
byte. The most significant four bits of the slave address are a
device type identifier, for the X9421 this is fixed as 0101[B]
(refer to Figure 2).
The least significant bit in the ID byte selects one of two
devices on the bus. The physical device address is defined
by the state of the A₀ input pin. The X9421 compares the
serial data stream with the address input state; a successful
compare of the address bit is required for the X9421 to
successfully continue the command sequence. The A₀ input
can be actively driven by a CMOS input signal or tied to V_CC
or V_SS.
The remaining three bits in the ID byte must be set to 110.
DEVICE TYPE
IDENTIFIER
0
1
0
11
1
0
A0
DEVICE ADDRESS
FIGURE 2. ADDRESS/IDENTIFICATION BYTE FORMAT
Instruction Byte
The next byte sent to the X9421 contains the instruction and
register pointer information. The four most significant bits are
the instruction. The next two bits point to one of four Data
Registers. The format is shown below in Figure 3.
REGISTER
SELECT
I3 I2 I1 I0 R1 R0 0
0
INSTRUCTIONS
FIGURE 3. INSTRUCTION BYTE FORMAT
The four high order bits of the instruction byte specify the
operation. The next two bits (R₁ and R₀) select one of the
four registers that is to be acted upon when a register
oriented instruction is issued. The last two bits are defined
as 0.
6
FN8196.4
January 14, 2009