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ISL8483 Datasheet, PDF (6/16 Pages) Intersil Corporation – 5V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers
ISL8483, ISL8485, ISL8488, ISL8489, ISL8490, ISL8491
Electrical Specifications
Test Conditions: VCC
Typicals are at VCC =
= 4.5V
5V, TA
to
=
5.5V; Unless
25oC, Note 2
Otherwise Specified.
(Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(oC) MIN TYP MAX UNITS
Receiver Input Resistance
No-Load Supply Current, Note 3
RIN
-7V ≤ VCM ≤ 12V
ICC
ISL8488, ISL8489, DE, DI, RE = 0V or VCC
ISL8490, ISL8491, DE, DI, RE = 0V or VCC
ISL8485, DI, RE = 0V or DE = VCC
VCC
DE = 0V
Full 12
-
-
kΩ
Full
-
160 250 µA
Full
-
340 500 µA
Full
-
550 900 µA
Full
-
340 500 µA
ISL8483, DI, RE = 0V or DE = VCC
VCC
DE = 0V
Full
-
Full
-
390 650 µA
160 250 µA
Shutdown Supply Current
ISHDN ISL8483, DE = 0V, RE = VCC, DI = 0V or VCC
Driver Short-Circuit Current,
VO = High or Low
IOSD1 DE = VCC, -7V ≤ VY or VZ ≤ 12V, Note 4
Receiver Short-Circuit Current
IOSR 0V ≤ VO ≤ VCC
SWITCHING CHARACTERISTICS (ISL8485, ISL8490, ISL8491)
Full
-
Full 35
Full
7
1
50
nA
-
250 mA
-
85
mA
Driver Input to Output Delay
tPLH, tPHL RDIFF = 54Ω, CL = 100pF, Figure 2
Driver Output Skew
tSKEW RDIFF = 54Ω, CL = 100pF, Figure 2
Driver Differential Rise or Fall Time tR, tF RDIFF = 54Ω, CL = 100pF, Figure 2
Driver Enable to Output High
tZH
CL = 100pF, SW = GND, Figure 3
Driver Enable to Output Low
tZL
CL = 100pF, SW = VCC, Figure 3
Driver Disable from Output High
tHZ
CL = 15pF, SW = GND, Figure 3
Driver Disable from Output Low
tLZ
CL = 15pF, SW = VCC, Figure 3
Receiver Input to Output Delay
tPLH, tPHL Figure 4
Receiver Skew | tPLH - tPHL |
tSKD Figure 4
Receiver Enable to Output High
tZH
CL = 15pF, SW = GND, Figure 5
Receiver Enable to Output Low
tZL
CL = 15pF, SW = VCC, Figure 5
Receiver Disable from Output High
tHZ
CL = 15pF, SW = GND, Figure 5
Receiver Disable from Output Low
tLZ
CL = 15pF, SW = VCC, Figure 5
Maximum Data Rate
fMAX
SWITCHING CHARACTERISTICS (ISL8483, ISL8488, ISL8489)
Full 18
Full
-
Full
3
Full
-
Full
-
Full
-
Full
-
Full 30
25
-
Full
-
Full
-
Full
-
Full
-
Full
5
30
50
ns
2
10
ns
11
25
ns
17
70
ns
14
70
ns
19
70
ns
13
70
ns
40
150
ns
5
-
ns
9
50
ns
9
50
ns
9
50
ns
9
50
ns
-
- Mbps
Driver Input to Output Delay
tPLH, tPHL RDIFF = 54Ω, CL = 100pF, Figure 2
Driver Output Skew
tSKEW RDIFF = 54Ω, CL = 100pF, Figure 2
Driver Differential Rise or Fall Time tR, tF RDIFF = 54Ω, CL = 100pF, Figure 2
Driver Enable to Output High
tZH
CL = 100pF, SW = GND, Figure 3, Note 5
Driver Enable to Output Low
tZL
CL = 100pF, SW = VCC, Figure 3, Note 5
Driver Disable from Output High
tHZ
CL = 15pF, SW = GND, Figure 3
Driver Disable from Output Low
tLZ
CL = 15pF, SW = VCC, Figure 3
Receiver Input to Output Delay
tPLH, tPHL Figure 4
Receiver Skew | tPLH - tPHL |
tSKD Figure 4
Receiver Enable to Output High
tZH
CL = 15pF, SW = GND, Figure 5, Note 6
Receiver Enable to Output Low
tZL
CL = 15pF, SW = VCC, Figure 5, Note 6
Receiver Disable from Output High
tHZ
CL = 15pF, SW = GND, Figure 5
Full 250 800 2000 ns
Full
-
160 800 ns
Full 250 800 2000 ns
Full 250
-
2000 ns
Full 250
-
2000 ns
Full 300
-
3000 ns
Full 300
-
3000 ns
Full 250 350 2000 ns
25
-
25
-
ns
Full
-
10
50
ns
Full
-
10
50
ns
Full
-
10
50
ns
6