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ISL6553_04 Datasheet, PDF (6/15 Pages) Intersil Corporation – Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller
ISL6553
RIN
FB
ERROR
AMPLIFIER
-
+
CORRECTION
∑
+
-
ISL6553
COMPARATOR
-
+
PWM
CIRCUIT
PROGRAMMABLE
REFERENCE
DAC
∑
+
-
I AVERAGE
-
∑
+
CURRENT
SENSING
CURRENT
AVERAGING
CURRENT
SENSING
-
+
∑
CORRECTION
COMPARATOR
+
PWM
-
CIRCUIT
VIN
PWM1
HIP6601
Q1
L1
IL1
Q2
PHASE
ISEN1
RISEN1
ISEN2
RISEN2
PWM2
HIP6601
VIN
PHASE
Q3
L2
IL2
Q4
VCORE
COUT RLOAD
FIGURE 1. SIMPLIFIED BLOCK DIAGRAM OF THE ISL6553 VOLTAGE AND CURRENT CONTROL LOOPS FOR A TWO POWER
CHANNEL REGULATOR
Operation
Figure 1 shows a simplified diagram of the voltage regulation
and current control loops. Both voltage and current feedback
are used to precisely regulate voltage and tightly control
output currents, IL1 and IL2 , of the two power channels. The
voltage loop comprises the Error Amplifier, Comparators,
gate drivers and output MOSFETs. The Error Amplifier is
essentially connected as a voltage follower that has as an
input, the Programmable Reference DAC and an output that
is the CORE voltage.
Voltage Loop
Feedback from the CORE voltage is applied via resistor RIN
to the inverting input of the error amplifier. This signal can
drive the error amplifier output either high or low, depending
upon the CORE voltage. Low CORE voltage makes the
amplifier output move towards a higher output voltage level.
Amplifier output voltage is applied to the positive inputs of
the comparators via the correction summing networks. Out-
of-phase sawtooth signals are applied to the two
comparators inverting inputs. Increasing error amplifier
6
voltage results in increased comparator output duty cycle.
This increased duty cycle signal is passed through the PWM
circuit with no phase reversal and on to the HIP6601, again
with no phase reversal for gate drive to the upper MOSFETs,
Q1 and Q3. Increased duty cycle or ON time for the
MOSFET transistors results in increased output voltage to
compensate for the low output voltage sensed.
Current Loop
The current control loop works in a similar fashion to the
voltage control loop, but with current control information
applied individually to each channel’s comparator. The
information used for this control is the voltage that is
developed across rDS(ON) of each lower MOSFET, Q2 and
Q4, when they are conducting. A single resistor converts and
scales the voltage across the MOSFETs to a current that is
applied to the current sensing circuit within the ISL6553.
Output from these sensing circuits is applied to the current
averaging circuit. Each PWM channel receives the difference
current signal from the summing circuit that compares the
average sensed current to the individual channel current.
When a power channel’s current is greater than the average