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| ISL54233 Datasheet, PDF (6/18 Pages) Intersil Corporation – Wideband Differential 3:1 Multiplexer | |||
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ISL54233
Test Circuits and Waveforms
VC0,C1
LOGIC
INPUT
VC0,C1
50%
tOFF
tr < 20ns
tf < 20ns
SWITCH
INPUT
VINPUT
SWITCH
OUTPUT 0V
VOUT
90%
tON
90%
Logic input waveform is inverted for switches that have the opposite logic
sense.
VDD
C
VINPUT
SWITCH
INPUT
C0, C1
COMx
LOGIC
INPUT
GND
VOUT
RL
CL
50Ω
10pF
Repeat test for all switches. CL includes fixture and stray
capacitance.
VOUT
=
V (INPUT)
---------R-----L---------
RL + rON
FIGURE 3A. ADDRESS tTRANS MEASUREMENT POINTS
FIGURE 3B. ADDRESS tTRANS TEST CIRCUIT
FIGURE 3. SWITCHING TIMES
VDD C
VC0
LOGIC
INPUT
VC1
VINPUT
3D- OR 3D+
2D- OR 2D+
1D- OR 1D+
C0, C1
COMx
VOUT
RL
CL
50Ω
10pF
VOUT
SWITCH
OUTPUT
0V
90%
LOGIC
INPUT
GND
tD
Repeat test for all switches. CL includes fixture and stray capacitance.
FIGURE 4A. MEASUREMENT POINTS
FIGURE 4B. TEST CIRCUIT
FIGURE 4. BREAK-BEFORE-MAKE TIME
VDD
C
rON = V1/17mA
xD- OR xD+
VD- OR VD+
C0
V1
C1
17mA
COMx
GND
0V
VDD
Repeat test for all switches.
FIGURE 5. rON TEST CIRCUIT
VDD
C
CTRL
xD- OR xD+
IMPEDANCE
ANALYZER
VCx
COMx
GND
VCxL OR
VCxH
Repeat test for all switches.
FIGURE 6. CAPACITANCE TEST CIRCUIT
6
FN7918.0
December 21, 2011
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