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ISL43L841_14 Datasheet, PDF (6/12 Pages) Intersil Corporation – Ultra Low ON-Resistance, Low-Voltage,Single Supply, Differential 4 to 1 Analog Multiplexer
Test Circuits and Waveforms
V+
LOGIC
INPUT
0V
VA0, VB0
SWITCH
OUTPUT 0V
tOFF
50%
tON
90% VOUT
ISL43L841
tr < 5ns
tf < 5ns
90%
C
V+
LOGIC
INPUT
V+
C
A0, B0
A1, A2, B1,
B2, A3, B3
INH
GND
COMA
COMB
ADD0-1
VOUT
RL
CL
50Ω
35pF
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 1A. INHIBIT tON/tOFF MEASUREMENT POINTS
Repeat test for other switches. CL includes fixture and stray
capacitance.
VOUT
=
V(NO or NC)
------------R-----L-------------
RL + R(ON)
FIGURE 1B. INHIBIT tON/tOFF TEST CIRCUIT
V+
LOGIC
INPUT
0V
VA0, VB0
SWITCH
OUTPUT
VA3, VB3
50%
tTRANS
VOUT
tr < 5ns
tf < 5ns
90%
10%
0V
C
V+
LOGIC
INPUT
V+
C
A0, B0
A1, A2, B1,
B2, A3, B3
COMA,
COMB
ADD0-1 GND INH
VOUT
RL
CL
50Ω
35pF
tTRANS
Logic input waveform is inverted for switches that have the opposite
logic sense.
Repeat test for other switches. CL includes fixture and stray
capacitance.
VOUT
=
V(NO or NC)
------------R-----L-------------
RL + R(ON)
FIGURE 1C. ADDRESS tTRANS MEASUREMENT POINTS
FIGURE 1D. ADDRESS tTRANS TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
V+
C
LOGIC OFF
INPUT
ON
SWITCH
OUTPUT
VOUT
V+
OFF
0V
∆VOUT
RG
Ax, Bx
0Ω
COMA,
COMB
ADD1
VG
ADD0 GND
CHANNEL
SELECT
INH
LOGIC
INPUT
Q = ∆VOUT x CL
FIGURE 2A. Q MEASUREMENT POINTS
Repeat test for other switches.
FIGURE 2B. Q TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
VOUT
CL
1000pF
6
FN6212.1
June 30, 2006