ISL43410_06 Datasheet, PDF (6/13 Pages) Intersil Corporation – Low-Voltage, Single Supply, DPDT High Performance Analog Switch

ISL43410
Test Circuits and Waveforms
3V
LOGIC
INPUT
0V
50%
t_ON
SWITCH
OUTPUT _0V
t_OFF
V_OUT
90%
t_r < 20ns
t_f < 20ns
90%
C
V+
LOGIC
INPUT
V+
C
NC
NO
COM
INH
GND ADD
V_OUT
R_L
300Ω
C_L
35pF
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 1A. MEASUREMENT POINTS
Repeat test for other switches. C_L includes fixture and stray
capacitance.
V_OUT = V(NO _{or NC)} -_R----_L-----+--^R--_R---^L--₍--_O-----_N----₎
FIGURE 1B. TEST CIRCUIT
3V
LOGIC
INPUT
0V
SWITCH
OUTPUT
0V
50%
t_TRANS
90% ^VOUT
t_r < 20ns
t_f < 20ns
90%
C
V+
LOGIC
INPUT
V+
C
NC
NO
ADD
COM
GND INH
V_OUT
R_L
300Ω
C_L
35pF
t_TRANS
Logic input waveform is inverted for switches that have the opposite
logic sense.
Repeat test for other switches. C_L includes fixture and stray
capacitance.
V_OUT = V(NO _{or NC)} -_R----_L-----+--^R--_R---^L--₍--_O-----_N----₎
FIGURE 1C. ADDRESS MEASUREMENT POINTS
FIGURE 1D. ADDRESS TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
LOGIC ^OFF
INPUT
ON
SWITCH
OUTPUT
V_OUT
Q = ∆V_OUT x C_L
3V
OFF
0V
∆V_OUT
V+
C
R_G
NO or NC
COM
ADD
V_G
GND INH
LOGIC
INPUT
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2. CHARGE INJECTION
FIGURE 2B. TEST CIRCUIT
V_OUT
C_L
6
FN6044.3
January 16, 2006