ICL7660SIBAZ Datasheet, PDF (6/12 Pages) Intersil Corporation – Simple Conversion of +5V Logic Supply to ±5V Supplies

ICL7660, ICL7660A
Typical Performance Curves (Test Circuit of Figure 11) (Continued)
+2
T_A = 25°C
V+ = 2V
+1
0
-1
SLOPE 150Ω
-2
0
1
2
3
4
5
6
7
8
LOAD CURRENT I_L (mA)
100
90
80
70
60
50
40
30
20
10
0
0
20.0
P_EFF
18.0
I+
16.0
14.0
12.0
10.0
8.0
6.0
T_A = 25°C
V+ = 2V
1.5
3.0
4.5
6.0
7.5
LOAD CURRENT I_L (mA)
4.0
2.0
0
9.0
FIGURE 9. OUTPUT VOLTAGE AS A FUNCTION OF OUTPUT
CURRENT
FIGURE 10. SUPPLY CURRENT AND POWER CONVERSION
EFFICIENCY AS A FUNCTION OF LOAD
CURRENT
NOTE:
6. These curves include in the supply current that current fed directly into the load R_L from the V+ (See Figure 11). Thus, approximately half the
supply current goes directly to the positive side of the load, and the other half, through the ICL7660/ICL7660A, to the negative side of the load.
Ideally, V_OUT ∼ 2V_IN, I_S ∼ 2I_L, so V_IN x I_S ∼ V_OUT x I_L.
C_{1 +}
10µF_-
1
8
2 _ICL7660
7
3 ^ICL7660A 6
4
5
C_OSC
(NOTE)
C₂ ^-
10µF ₊
I_S V+
(+5V)
I_L
R_L
-V_OUT
NOTE: For large values of C_OSC (>1000pF) the values of C₁ and C2 should be increased to 100µF.
FIGURE 11. ICL7660, ICL7660A TEST CIRCUIT
Detailed Description
The ICL7660 and ICL7660A contain all the necessary
circuitry to complete a negative voltage converter, with the
exception of 2 external capacitors which may be inexpensive
10µF polarized electrolytic types. The mode of operation of
the device may be best understood by considering Figure
12, which shows an idealized negative voltage converter.
Capacitor C₁ is charged to a voltage, V+, for the half cycle
when switches S₁ and S₃ are closed. (Note: Switches S₂
and S₄ are open during this half cycle.) During the second
half cycle of operation, switches S₂ and S₄ are closed, with
S₁ and S₃ open, thereby shifting capacitor C₁ negatively by
V+ volts. Charge is then transferred from C₁ to C₂ such that
the voltage on C₂ is exactly V+, assuming ideal switches and
no load on C₂. The ICL7660 approaches this ideal situation
more closely than existing non-mechanical circuits.
In the ICL7660 and ICL7660A, the 4 switches of Figure 12
are MOS power switches; S₁ is a P-Channel device and S₂,
S₃ and S₄ are N-Channel devices. The main difficulty with
this approach is that in integrating the switches, the
substrates of S₃ and S₄ must always remain reverse biased
with respect to their sources, but not so much as to degrade
their “ON” resistances. In addition, at circuit start-up, and
under output short circuit conditions (V_OUT = V+), the output
voltage must be sensed and the substrate bias adjusted
accordingly. Failure to accomplish this would result in high
power losses and probable device latchup.
This problem is eliminated in the ICL7660 and ICL7660A by a
logic network which senses the output voltage (V_OUT) together
with the level translators, and switches the substrates of S₃ and
S₄ to the correct level to maintain necessary reverse bias.
6
FN3072.7
October 10, 2005