HA5025_03 Datasheet, PDF (6/15 Pages) Intersil Corporation – Quad, 125MHz Video Current Feedback Amplifier

HA5025
Application Information
Optimum Feedback Resistor
The plots of inverting and non-inverting frequency response,
see Figure 8 and Figure 9 in the typical performance section,
illustrate the performance of the HA5025 in various closed
loop gain configurations. Although the bandwidth dependency
on closed loop gain isn’t as severe as that of a voltage
feedback amplifier, there can be an appreciable decrease in
bandwidth at higher gains. This decrease may be minimized
by taking advantage of the current feedback amplifier’s unique
relationship between bandwidth and R_F. All current feedback
amplifiers require a feedback resistor, even for unity gain
applications, and R_F, in conjunction with the internal
compensation capacitor, sets the dominant pole of the
frequency response. Thus, the amplifier’s bandwidth is
inversely proportional to R_F. The HA5025 design is optimized
for a 1000Ω R_F at a gain of +1. Decreasing R_F in a unity gain
application decreases stability, resulting in excessive peaking
and overshoot. At higher gains the amplifier is more stable, so
R_F can be decreased in a trade-off of stability for bandwidth.
The following table lists recommended R_F values for various
gains, and the expected bandwidth.
GAIN
(A_CL)
-1
+1
+2
+5
+10
-10
R_F (Ω)
750
1000
681
1000
383
750
BANDWIDTH
(MHz)
100
125
95
52
65
22
PC Board Layout
The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The
use of low inductance components such as chip resistors
and chip capacitors is strongly recommended. If leaded
components are used the leads must be kept short
especially for the power supply decoupling components and
those components connected to the inverting input.
Attention must be given to decoupling the power supplies. A
large value (10µF) tantalum or electrolytic capacitor in
parallel with a small value (0.1µF) chip capacitor works well
in most cases.
A ground plane is strongly recommended to control noise.
Care must also be taken to minimize the capacitance to
ground seen by the amplifier’s inverting input (-IN). The larger
this capacitance, the worse the gain peaking, resulting in
pulse overshoot and possible instability. It is recommended
that the ground plane be removed under traces connected to
-IN, and that connections to -IN be kept as short as possible to
minimize the capacitance from this node to ground.
Driving Capacitive Loads
Capacitive loads will degrade the amplifier’s phase margin
resulting in frequency response peaking and possible
oscillations. In most cases the oscillation can be avoided by
placing an isolation resistor (R) in series with the output as
shown in Figure 6.
100Ω
V_IN
+_-
R
R_T
R_I
R_F
V_OUT
C_L
FIGURE 6. PLACEMENT OF THE OUTPUT ISOLATION
RESISTOR, R
The selection criteria for the isolation resistor is highly
dependent on the load, but 27Ω has been determined to be
a good starting value.
Power Dissipation Considerations
Due to the high supply current inherent in quad amplifiers,
care must be taken to insure that the maximum junction
temperature (T_J, see Absolute Maximum Ratings) is not
exceeded. Figure 7 shows the maximum ambient
temperature versus supply voltage for the available package
styles (PDIP, SOIC). At V_S = ±5V quiescent operation both
package styles may be operated over the full industrial range
of -40^oC to 85^oC. It is recommended that thermal
calculations, which take into account output power, be
performed by the designer.
130
120
110
100
90
80
70
60
50
40
30
20
10
5
SOIC
PDIP
7
9
11
13
15
SUPPLY VOLTAGE (±V)
FIGURE 7. MAXIMUM OPERATING AMBIENT TEMPERATURE
vs SUPPLY VOLTAGE
6