X9410 Datasheet, PDF (5/21 Pages) Xicor Inc. – Dual Digitally Controlled Potentiometer

X9410
Figure 1. Detailed Potentiometer Block Diagram
(One of Two Arrays)
Serial Data Path
From Interface
Circuitry
Register 0
8
Register 2
If WCR = 00[H] then V_W/R_W = V_L/R_L
If WCR = 3F[H] then V_W/R_W = V_H/R_H
Serial
Bus
Input
C
Register 1
o
u
6
Parallel
Bus
Input
n
t
e
r
Register 3
Wiper
Counter
D
Register
e
(WCR)
c
o
d
e
UP/DN
INC/DEC
Logic
UP/DN
Modified SCL
CLK
V_H/R_H
V_L/R_L
Write in Process
The contents of the Data Registers are saved to
nonvolatile memory when the CS pin goes from LOW
to HIGH after a complete write sequence is received
by the device. The progress of this internal write
operation can be monitored by a Write In Process bit
(WIP). The WIP bit is read with a Read Status
command.
INSTRUCTIONS
Identification (ID) Byte
The first byte sent to the X9410 from the host,
following a CS going HIGH to LOW, is called the
Identification byte. The most significant four bits of the
slave address are a device type identifier, for the
X9410 this is fixed as 0101[B] (refer to Figure 2).
The two least significant bits in the ID byte select one
of four devices on the bus. The physical device
address is defined by the state of the A₀ - A₁ input
pins. The X9410 compares the serial data stream with
the address input state; a successful compare of both
address bits is required for the X9410 to successfully
continue the command sequence. The A₀ - A₁ inputs
can be actively driven by CMOS input signals or tied to
V_CC or V_SS.
5
V_W/R_W
The remaining two bits in the ID byte must be set to 0.
Figure 2. Identification Byte Format
Device Type
Identifier
0 1 0 1 _{0 0 A1 A0}
Device Address
Instruction Byte
The next byte sent to the X9410 contains the
instruction and register pointer information. The four
most significant bits are the instruction. The next four
bits point to one of the two pots and when applicable
they point to one of four associated registers. The
format is shown below in Figure 3.
FN8193.1
September 19, 2005