X9221A_06 Datasheet, PDF (5/15 Pages) Intersil Corporation – Dual Digitally Controlled Potentiometer

X9221A
tuning capability to the host. For each SCL clock pulse
(t_HIGH) while SDA is HIGH, the selected wiper will
move one resistor segment towards the V_H/R_H termi-
nal. Similarly, for each SCL clock pulse while SDA is
Figure 3. Two-Byte Command Sequence
LOW, the selected wiper will move one resistor seg-
ment towards the V_L/R_L terminal. A detailed illustra-
tion of the sequence and timing for this operation are
shown in Figures 5 and 6 respectively.
SCL
SDA
S 0 1 0 1 A3 A2 A1 A0 _A I3 I2 I1 I0 0 P0 R1 R0 _A S
T
C
CT
A
K
KO
R
P
T
Figure 4. Three-Byte Command Sequence
SCL
SDA
S 0 1 0 1 A3 A2 A1 A0 A I3 I2 I1 I0 0 P0 R1 R0 A 0 0 D5 D4 D3 D2 D1 D0 A S
T
A
R
C
K
C
K
C
K
T
O
P
T
Figure 5. Increment/Decrement Command Sequined
e
SCL
SDA
XX
S 0 1 0 1 A3 A2 A1 A0 A I3 I2 I1 I0 0 P0 R1 R0 A I I
T
A
C
K
C
K
N
C
N
C
R
T
12
ID
NE
CC
n1
DS
ET
CO
nP
5
FN8163.2
August 30, 2006