ISL6520_07 Datasheet, PDF (5/11 Pages) Intersil Corporation – Single Synchronous Buck Pulse-Width Modulation (PWM) Controller

ISL6520
Start interval and causes an over-current trip. The converter
dissipates very little power with this method. The measured
input power for the conditions of Figure 1 is only 1.5W.
(FB pin) voltage, the output voltage is in regulation. This
method provides a rapid and controlled output voltage rise. The
entire startup sequence typically take about 11ms.
OUTPUT INDUCTOR
CURRENT
5A/DIV.
COMP/OCSET
1V/DIV.
V_OUT
500mV/DIV.
TIME (5ms/DIV.)
FIGURE 1. OVERCURRENT OPERATION
The over-current function will trip at a peak inductor current
(I_PEAK) determined by:
I_PEAK
=
I--_{O-----C----S----E----T-----x-----R-----O----C-----S----E---T--}
r_DS(ON)
(EQ. 3)
where I_OCSET is the internal OCSET current source (20μA
typical). The OC trip point varies mainly due to the
MOSFET’s r_DS(ON) variations. To avoid over-current tripping
in the normal operating load range, find the R_OCSET resistor
from the equation above with:
1. The maximum r_DS(ON) at the highest junction
temperature.
2. The minimum I_OCSET from the specification table.
3. Determine I_PEAK for
I_PEAK
>
I_OUT(MAX)
+
(_---Δ_----I_---)
2
,
where ΔI is the output inductor ripple current.
For an equation for the ripple current, see“Output Inductor
Selection” on page 7.
Soft-Start
The POR function initiates the soft-start sequence after the
overcurrent set point has been sampled. Soft-start clamps the
error amplifier output (COMP pin) and reference input (non-
inverting terminal of the error amp) to the internally generated
Soft-Start voltage. Figure 2 shows a typical start up interval
where the COMP/OCSET pin has been released from a
grounded (system shutdown) state. Initially, the COMP/OCSET
is used to sample the oversurrent setpoint by disabling the error
amplifier and drawing 20μA through R_OCSET. Once the over-
current level has been sampled, the soft start function is
initiated. The clamp on the error amplifier (COMP/OCSET pin)
initially controls the converter’s output voltage during soft start.
The oscillator’s triangular waveform is compared to the ramping
error amplifier voltage. This generates PHASE pulses of
increasing width that charge the output capacitor(s). When the
internally generated Soft-Start voltage exceeds the feedback
5
TIME (2ms/DIV.)
FIGURE 2. START UP SEQUENCE
Application Guidelines
Layout Considerations
As in any high frequency switching converter, layout is very
important. Switching current from one power device to another
can generate voltage transients across the impedances of the
interconnecting bond wires and circuit traces. These
interconnecting impedances should be minimized by using
wide, short printed circuit traces. The critical components
should be located as close together as possible, using ground
plane construction or single point grounding.
V_IN
ISL6520
UGATE
Q₁
PHASE
LGATE
Q₂
L_O
V_OUT
C_IN
C_O
RETURN
FIGURE 3. PRINTED CIRCUIT BOARD POWER AND
GROUND PLANES OR ISLANDS
Figure 3 shows the critical power components of the converter.
To minimize the voltage overshoot, the interconnecting wires
indicated by heavy lines should be part of a ground or power
plane in a printed circuit board. The components shown in
Figure 3 should be located as close together as possible.
Please note that the capacitors C_IN and C_O may each
represent numerous physical capacitors. Locate the ISL6520
within 3 inches of the MOSFETs, Q₁ and Q₂ . The circuit traces
for the MOSFETs’ gate and source connections from the
ISL6520 must be sized to handle up to 1A peak current.
FN9009.6
April 3, 2007