ISL6412 Datasheet, PDF (5/10 Pages) Intersil Corporation – Triple Output, Low-Noise LDO Regulator with Integrated Reset Circuit

ISL6412
Electrical Specifications V_IN = +3.3V, Compensation Capacitor = 33nF, T_A = 25°C (Note 2), unless otherwise noted. (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Output Voltage Noise (Note 5)
LDO3 SPECIFICATIONS
10Hz < f < 100kHz, I_OUT = 10mA
C_OUT = 2.2µF
-
65
-
µV_RMS
C_OUT = 10µF
-
60
-
µV_RMS
Output Voltage (V_OUT3)
Output Voltage Accuracy
Maximum Output Current (I_OUT3) (Note 5)
Output Current Limit
-
2.8
-
V
I_OUT = 10mA, T_A = -40°C to 85°C
-2.0
-
2.0
%
VIN = 3.6V
225
-
-
mA
300
450
840
mA
Dropout Voltage (Note 3)
Line Regulation
Load Regulation
Output Voltage Noise (Note 5)
RESET BLOCK SPECIFICATIONS
I_OUT = 125mA
-
100
160
mV
V_IN = 3.0V to 3.6V, I_OUT = 10mA
-0.15
0.0
0.15
%/V
I_OUT = 10mA to 125mA
-
0.2
1.0
%
10Hz < f < 100kHz, I_OUT = 10mA
C_OUT = 2.2µF
-
30
-
µV_RMS
C_OUT = 10µF
-
20
-
µV_RMS
Reset Threshold
2.564
2.630
2.66
V
Reset Threshold Hysteresis (Note 5)
6.3
-
-
mV
V_IN to Reset Delay
RESET Active Timeout Period (Notes 4, 5)
VCC = V_TH to V_TH - 100mV
-
20
-
µs
25
-
-
ms
FAULT1
Rising Threshold
% of V_OUT
+5.5
+8.0
+10.5
%
Falling Threshold
% of V_OUT
-10.5
-8.0
-5.5
%
NOTES:
3. Specifications at -40°C are guaranteed by design/characterization, not production tested.
4. The dropout voltage is defined as V_IN - V_OUT , when V_OUT is 50mV below the value of V_OUT for V_IN = V_OUT + 0.5V.
5. The RESET time is linear with CT at a slope of 2.55ms/nF. Thus, at 10nF (0.01µF) the RESET time is 25.5ms.
6. Guaranteed by design, not production tested.
Typical Performance Curves
The test conditions for the Typical Operating Performance are: V_IN = 5V, T_A = 25°C,
R_IREF = R_IMIN = 80kΩ, V_BAT = 3.7V, Unless Otherwise Noted
OUT3
2V/DIV
OUT2
2V/DIV
OUT3
2V/DIV
OUT2
2V/DIV
OUT1
2V/DIV
200µs/DIV
FIGURE 1. STARTUP
OUT1
2V/DIV
200µs/DIV
FIGURE 2. OUTPUT DURING SHUTDOWN
5