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ISL5961 Datasheet, PDF (5/13 Pages) Intersil Corporation – 14-Bit, +3.3V, 130/210MSPS, CommLinkTM High Speed D/A Converter
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ISL5961
Electrical Specifications
PARAMETER
AVDD = DVDD = +3.3V, VREF = Internal 1.2V, IOUTFS = 20mA, TA = 25oC for All Typical Values (Continued)
TA = -40oC TO 85oC
TEST CONDITIONS
MIN TYP MAX UNITS
Spurious Free Dynamic Range,
SFDR to Nyquist (fCLK/2)
fCLK = 210MSPS, fOUT = 80.8MHz (Notes 4, 7)
-
52
-
dBc
fCLK = 210MSPS, fOUT = 40.4MHz (Notes 4, 7, 9)
-
61
-
dBc
fCLK = 200MSPS, fOUT = 20.2MHz, T = 25oC (Notes 4, 7)
62
64
-
dBc
fCLK = 200MSPS, fOUT = 20.2MHz, T = -40oC to 85oC (Notes 4, 7) 60
-
-
dBc
fCLK = 130MSPS, fOUT = 50.5MHz (Notes 4, 7)
-
59
-
dBc
fCLK = 130MSPS, fOUT = 40.4MHz (Notes 4, 7)
-
63
-
dBc
fCLK = 130MSPS, fOUT = 20.2MHz (Notes 4, 7)
-
70
-
dBc
fCLK = 130MSPS, fOUT = 10.1MHz (Notes 4, 7)
-
75
-
dBc
fCLK = 130MSPS, fOUT = 5.05MHz, T = 25oC (Notes 4, 7)
72
79
-
dBc
fCLK = 130MSPS, fOUT = 5.05MHz, T = -40oC to 85oC (Notes 4, 7) 70
-
-
dBc
fCLK = 100MSPS, fOUT = 40.4MHz (Notes 4, 7)
-
61
-
dBc
fCLK = 80MSPS, fOUT = 30.3MHz (Notes 4, 7)
-
65
-
dBc
fCLK = 80MSPS, fOUT = 20.2MHz (Notes 4, 7)
-
71
-
dBc
fCLK = 80MSPS, fOUT = 10.1MHz (Notes 4, 7, 9)
-
71
-
dBc
fCLK = 80MSPS, fOUT = 5.05MHz (Notes 4, 7)
-
78
-
dBc
fCLK = 50MSPS, fOUT = 20.2MHz (Notes 4, 7)
-
70
-
dBc
fCLK = 50MSPS, fOUT = 10.1MHz (Notes 4, 7)
-
75
-
dBc
fCLK = 50MSPS, fOUT = 5.05MHz (Notes 4, 7)
-
79
-
dBc
Spurious Free Dynamic Range,
fCLK = 210MSPS, fOUT = 28.3MHz to 45.2MHz, 2.1MHz Spacing,
-
67
-
dBc
SFDR in a Window with Eight Tones 50MHz Span (Notes 4, 7, 9)
fCLK = 130MSPS, fOUT =17.5MHz to 27.9MHz, 1.3MHz Spacing,
-
70
-
dBc
35MHz Span (Notes 4, 7)
fCLK = 80MSPS, fOUT = 10.8MHz to 17.2MHz, 811kHz Spacing,
-
77
-
dBc
15MHz Span (Notes 4, 7)
fCLK = 50MSPS, fOUT = 6.7MHz to 10.8MHz, 490kHz Spacing,
10MHz Span (Notes 4, 7)
-
78
-
dBc
Spurious Free Dynamic Range,
fCLK = 78MSPS, fOUT = 11MHz, in a 20MHz Window, RBW=30kHz -
94
-
dBc
SFDR in a Window with EDGE or GSM (Notes 4, 7, 9)
Adjacent Channel Power Ratio,
fCLK = 76.8MSPS, fOUT = 19.2MHz, RBW=30kHz (Notes 4, 7, 9)
-
71
-
dB
ACPR with UMTS
VOLTAGE REFERENCE
Internal Reference Voltage, VFSADJ
Internal Reference Voltage Drift
Pin 18 Voltage with Internal Reference
1.2 1.23 1.3
V
-
±40
-
ppm/oC
Internal Reference Output Current
Sink/Source Capability
Reference is not intended to be externally loaded
-
0
-
µA
Reference Input Impedance
-
1
-
MΩ
Reference Input Multiplying Bandwidth (Note 7)
-
1.0
-
MHz
DIGITAL INPUTS D13-D0, CLK
Input Logic High Voltage with
3.3V Supply, VIH
Input Logic Low Voltage with
3.3V Supply, VIL
Sleep Input Current, IIH
(Note 3)
(Note 3)
2.3
3.3
-
V
-
0
1.0
V
-25
-
+25
µA
5
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