ISL55141_0607 Datasheet, PDF (5/14 Pages) Intersil Corporation – High-Speed 18V CMOS Comparators

ISL55141, ISL55142, ISL55143
Electrical Specifications Test Conditions: V_CC = 12V, V_EE = -3V, V_OH = 5V, V_OL = 0V, PD = V_EE, C_LOAD = 15pF_, T_A = 25°C, unless
otherwise specified. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL OUTPUTS Q_AX, Q_BX
Output Resistance
RoutR
18
27
37
Ω
Output Logic High Voltage
V_OH
Output Logic Low Voltage
V_OL
POWER SUPPLIES, STATIC CONDITIONS
V_OH = 5V, I_SOURCE = 1mA
V_OL = 0V, I_SINK = 1mA
4.9
4.95
5.0
V
0.00
0.05
0.1
V
Positive Supply DC Current/Comparator I_CC No input data
Negative Supply Current/Comparator
Total Power Dissipation/Comparator
I_EE No input data
P^†
Input data at 40MHz
+8.25
12.5
mA
-12.5 -8.25
mA
670
mW
†Total Power dissipation per comparator can be approximately calculated from the following:
P = (V_CC-V_EE)*8.25mW + 90pF*(V_CC-V_EE)^2*f + C_L*(V_CC-V_EE)^2*f
where f is the operating frequency and C_L is the load capacitance.
Because the ISL55142 has two comparators, the power dissipation would be twice of P calculated from the above equation. The ISL55143 would
be four times P.
NOTES:
3. Lab characterization, room temperature, timing parameters matched stimulus/loads, channel-to-channel skew < 500ps, 1ns maximum by design
4. Note about I_CC measurement input can approach 140mA (single comparator) at maximum pattern rates
5. Not 100% Tested
Test Circuits and Waveforms
DATA = 1
DATA = 0
400mV
V_INPX
t_PDLH
Q_AX, Q_BX
50%
t_R
0V
t_PDHL
50%
V_OH (≈V_H)
V_OL (≈V_L)
t_F
FIGURE 1. COMPARATOR PROPAGATION DELAY AND TRANSITION TIME MEASUREMENT POINTS
CV_A 2.4V
V_INP
CV_B 0.4V
+
-
V_CC
+
V_EE
-
Although there is no electrical difference between the CV_A
and CV_B Inputs, if one defines CV_A as being the high
threshold and CV_B being the low threshold, it becomes
easier to understand the utilization of a dual threshold
comparator. Essentially this enables the qualification of an
Q_A
incoming signal into three states. In the case pictured, the
three states are Valid Low <0.4V, No-man’s-land (between
0.4 and 2.4V), Valid High >2.4V. Table 2 shows how the
Q_A/Q_B truth table would be utilized in the real world.
Q_B
TABLE 2. Q_A/Q_B TRUTH TABLE
<0.4V
V_INP
Q_A
Q_B
COMMENT
0
0 Valid 0
>0.4 and <2.4V
0
1 Invalid
>2.4V
1
1 Valid 1
FIGURE 2. THREE-STATE WINDOW COMPARATOR FUNDAMENTALS
5
FN6230.0
July 17, 2006