ISL54053 Datasheet, PDF (5/12 Pages) Intersil Corporation – Ultra Low ON-Resistance, Low Voltage, Single Supply, SPDT Analog Switch

ISL54053
Electrical Specifications - 3V Supply Test Conditions: V+ = +2.7V to +3.6V, GND = 0V, V_INH = 1.4V, V_INL = 0.5V (Note 9),
Unless Otherwise Specified. Boldface limits apply over the operating temperature
range, -40°C to +85°C. (Continued)
PARAMETER
TEST CONDITIONS
COM ON Capacitance,
C_COM(ON)
f = 1MHz, V_NO or V_NC = V_COM = 0V
(See Figure 7)
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, V_INL
Input Voltage High, V_INH
Input Current, I_INH, I_INL
V+ = 3.6V, V_IN = 0V or V+
TEMP
MIN
MAX
(°C) (Notes 10, 11) TYP (Notes 10, 11) UNITS
25
-
48
-
pF
Full
-
-
0.5
V
Full
1.4
-
-
V
Full
-0.1
-
0.1
μA
Electrical Specifications - 1.8V Supply
Test Conditions: V+ = +1.8V, GND = 0V, V_INH = 1V, V_INL = 0.4V (Note 9),
Unless Otherwise Specified. Boldface limits apply over the operating
temperature range, -40°C to +85°C.
PARAMETER
TEST CONDITIONS
TEMP
MIN
MAX
(°C) (Notes 10, 11) TYP (Notes 10, 11) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range,
V_ANALOG
Full
0
-
V+
V
ON-Resistance, r_ON
V+ = 1.8V, I_COM = 10mA, V_NO or V_NC = 0V 25
-
2.33
-
Ω
to V+, (See Figure 5, Note 13)
Full
-
2.54
-
Ω
DYNAMIC CHARACTERISTICS
Turn-ON Time, t_ON
V+ = 1.8V, V_NO or V_NC = 1.5V, R_L = 50Ω,
25
-
68
-
ns
C_L = 35pF (See Figure 1, Note 13)
Full
-
93
-
ns
Turn-OFF Time, t_OFF
V+ = 1.8V, V_NO or V_NC = 1.5V, R_L = 50Ω,
25
-
45
-
ns
C_L = 35pF (See Figure 1, Note 13)
Full
-
71
-
ns
Break-Before-Make Time
V+ = 1.8V, V_NO or V_NC = 1.5V, R_L = 50Ω,
Full
-
15
-
ns
Delay, t_D
C_L = 35pF (See Figure 3, Note 13)
Charge Injection, Q
V_G = 0, R_G = 0Ω, C_L = 1.0nF (See Figure 2) 25
-
18
-
pC
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, V_INL
Full
-
-
0.4
V
Input Voltage High, V_INH
Full
1
-
-
V
NOTES:
9. V_IN = input voltage to perform proper function.
10. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data
sheet.
11. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established
by characterization and are not production tested.
12. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal
range.
13. Limits established by characterization and are not production tested.
5
FN6460.3
October 19, 2009