ISL45042A_07 Datasheet, PDF (5/8 Pages) Intersil Corporation – LCD Module Calibrator

ISL45042A
Figure 2. It then takes a maximum of 100ms for the
programming to be completed inside the device.
CTL VOLTAGE
>200µs
4.9V
CTL_PT
TIME
FIGURE 2. EEPROM PROGRAMMING
When the part is programmed, the counter setting is loaded
into the non-volatile memory. This value will be loaded from
the nonvolatile memory during initial power-up or when the
CE pin is pulled low.
Once the programming is completed, it is recommended that
the user float the CLT pin. The CTL pin is internally tied to a
resistor network connected to ground. If left floating, the
voltage at the CTL pin will equal V_DD/2. Under these
conditions, no additional pulses will be seen by the Up/Down
counter via the CTL pin. To prevent further programming,
ground the CE pin.
CTL should have a noise filter to reduce bouncing or noise
on the input that could cause unwanted counting when the
CE pin is high. The board should have an additional ESD
protection circuit, with a series 1kΩ resistor and a shunt
0.01µF capacitor connected on the CTL pin. (See Figure 3)
To avoid unintentional adjustment, the ISL45042A
guarantees to reject CTL pulses shorter than 20µs.
During Initial Power-up (only), to avoid the possibility of a
false pulse (since the internal comparators come up in an
unknown state), the very first CTL pulse is ignored. See
Figure 7 for the timing information.
CE Pin
To adjust the output voltage, the CE pin must be pulled high
(VDD). The CE pin has an internal pull-down resistor to
prevent unwanted reprogramming of the EEPROM. The
impedance of this resistor is 400kΩ to 500kΩ (R_INTERNAL
Figure 6).
The CE pin has a Schmitt trigger on the input to prevent
false triggering during slow transitions of the CE pin.
Transitions of the CE pin are recommended to be less than
10µs.
Replacing Existing Mechanical Potentiometer
Circuits
Figure 4 shows the common adjustment mechanical circuits
and equivalent replacement with the ISL45042A.
Expected Output Voltage
The ISL45042A provides an output sink current, which
lowers the voltage on the external voltage divider (V_COM
output voltage). Equation 1 and Equation 2 can be used to
calculate the output current (I_OUT) and output voltage
(V_OUT) values.
I_OUT
=
S_-----e_----t_--t_--i_--n_----g_-
128
x
------^A-----^V----^D----^D-------
20 ( R_{S E T} )
(EQ. 1)
V_OUT
=
⎛
⎜
⎝
-_R----₁--^R---+--²--_R-----₂-_{⎠⎟⎞}
A
⎛
V _{D D ⎝⎜}
1
–
S_-----e_----t_--t_--i_--n_----g_-
128
x
-₂---₀----₍--_R-^R----_S1----_E----_T---_{)⎠⎟⎞}
(EQ. 2)
NOTE: Where setting is an integer between 1 and 128.
1kΩ
0.01µF
ISL45042A
CTL
FIGURE 3. EXTERNAL ESD PROTECTION ON CTL PIN
AVDD
R_a
-
R_b
+
R_c
VCOM
R₁ = R_a
R₂ = R_b + R_c
AVDD
AVDD
ISL45042A
SET
OUT
R_SET
R₁
-
+
R₂
VCOM
R_SET = (R_a(R_b + Rc)) / 20R_b
FIGURE 4. EXAMPLE OF THE REPLACEMENT FOR THE MECHANICAL POTENTIOMETER CIRCUIT USING THE ISL45042A
5
FN6158.3
August 29, 2007