ISL45041 Datasheet, PDF (5/7 Pages) Intersil Corporation – TFT-LCD I2C Programmable VCOM Calibrator

ISL45041
Application Information
This device provides the ability to reduce the flicker of an LCD
panel by adjustment of the V_COM voltage during production
test and alignment. A 128-step resolution is provided under
digital control, which adjusts the sink current of the output.
The output is connected to an external voltage divider, so that
the device will have the capability to reduce the voltage on the
output by increasing the output sink current.
AVDD
AVDD
ISL45041
SET
OUT
R₁
-
+
R_SET
I_OUT
R₂
FIGURE 1. OUTPUT CONNECTION CIRCUIT EXAMPLE
The adjustment of the output is provided by the 2-wire I²C
serial interface.
Expected Output Voltage
The ISL45041 provides an output sink current, which lowers
the voltage on the external voltage divider (VCOM output
voltage). Equation 1 and Equation 2 can be used to calculate
the output current (I_OUT) and output voltage (V_OUT) values.
I_OUT
=
S_-----e_----t_--t_--i_--n_----g_-
128
x
------^A----^V-----^D----^D-------
20 ( R_{S E T} )
(EQ. 1)
V_OUT
=
⎛
⎜
⎝
-_R----₁--^R---+--²--_R-----₂-_{⎠⎟⎞}
A
V_D
⎛
D _⎝⎜
1
–
S_-----e_----t_--t_--i_--n_----g_-
128
x
-₂---₀----₍--_R-^R----_S1----_E---_T----_{)⎠⎟⎞}
(EQ. 2)
NOTE: Where setting is an integer between 1 and 128.
Table 1 gives the calculated value of V_OUT for the evaluation
board using the on-board resistors values of: R_SET = 24.9k,
R₁ = 200k, R₂ = 243k, and AV_DD = 10V.
TABLE 1.
SETTING VALUE
1
10
20
30
40
50
V_OUT
5.468
5.313
5.141
4.969
4.797
4.625
TABLE 1. (Continued)
SETTING VALUE
60
V_OUT
4.453
70
4.281
80
4.109
90
3.936
100
3.764
110
3.592
128
3.282
R_SET Resistor
The external R_SET resistor sets the full-scale sink current that
determines the lowest voltage of the external voltage divider R₁
and R₂ (Figure 1). The voltage difference between the OUT pin
and SET pin (Figure 2) has to be greater than 1.75V. This will
keep the output MOS transistor in the saturation region.
Expected current settings and 7-Bit accuracy occurs when the
output MOS transistor is operating in the saturation region.
Figure 2 shows the internal connection for the output MOS
transistor. The value of the AV_DD supply sets the voltage at the
source of the output transistor. This voltage is equal to
(Setting/128) x (AV_DD/20). The I_SET current is therefore equal
to (Setting/128) x (AV_DD/20 x R_SET). The value of the Drain
voltage is found using Equation 2. The values of R₁ and R₂
(Equation 2) should be determined (setting equal to 128) so the
minimum value of V_OUT is greater than 1.75V + AV_DD/20.
S-----E----T-----T----I--N-----G--- _x ^{A-----V-----D----D---}
128
20
OUT PIN
AV_DD = 15V
R1
AVDD
VSAT
R2
0.5V
RSET
SET PIN
FIGURE 2. OUTPUT CONNECTION CIRCUIT EXAMPLE
Ramp-Up of the VDD Power Supply
It is required that the ramp-up from 10% VDD to 90% VDD
level be achieved in less than or equal to 10ms to assure
that the EEPROM and Power-on-reset circuits are
synchronized and the correct value is read from the
EEPROM Memory.
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FN6189.3
August 12, 2010