HIP6012 Datasheet, PDF (5/10 Pages) Intersil Corporation – Buck and Synchronous-Rectifier Pulse-Width Modulator (PWM) Controller

HIP6012
PGND (Pin 11)
This is the power ground connection. Tie the lower MOSFET
source to this pin.
LGATE (Pin 12)
Connect LGATE to the lower MOSFET gate. This pin
provides the gate drive for the lower MOSFET.
PVCC (Pin 13)
Provide a bias supply for the lower gate drive to this pin.
VCC (Pin 14)
Provide a 12V bias supply for the chip to this pin.
Functional Description
Initialization
The HIP6012 automatically initializes upon receipt of power.
Special sequencing of the input supplies is not necessary.
The Power-On Reset (POR) function continually monitors
the input supply voltages and the enable (EN) pin. The POR
monitors the bias voltage at the VCC pin and the input
voltage (V_IN) on the OCSET pin. The level on OCSET is
equal to V_IN Less a fixed voltage drop (see over-current
protection). With the EN pin held to V_CC, the POR function
initiates soft start operation after both input supply voltages
exceed their POR thresholds. For operation with a single
+12V power source, V_IN and V_CC are equivalent and the
+12V power source must exceed the rising V_CC threshold
before POR initiates operation.
The Power-On Reset (POR) function inhibits operation with
the chip disabled (EN pin low). With both input supplies
above their POR thresholds, transitioning the EN pin high
initiates a soft start interval.
Soft Start
The POR function initiates the soft start sequence. An internal
10µA current source charges an external capacitor (C_SS) on
the SS pin to 4V. Soft start clamps the error amplifier output
(COMP pin) and reference input (+ terminal of error amp) to
the SS pin voltage. Figure 3 shows the soft start interval with
C_SS = 0.1µF. Initially the clamp on the error amplifier (COMP
pin) controls the converter’s output voltage. At t1 in Figure 3,
the SS voltage reaches the valley of the oscillator’s triangle
wave. The oscillator’s triangular waveform is compared to the
ramping error amplifier voltage. This generates PHASE
pulses of increasing width that charge the output capacitor(s).
This interval of increasing pulse width continues to t2. With
sufficient output voltage, the clamp on the reference input
controls the output voltage. This is the interval between t2 and
t3 in Figure 3. At t3 the SS voltage exceeds the reference
voltage and the output voltage is in regulation. This method
provides a rapid and controlled output voltage rise.
SOFT-START
(1V/DIV)
OUTPUT
VOLTAGE
0V
(1V/DIV)
0V
t1
t2
t3
TIME (5ms/DIV)
FIGURE 3. SOFT-START INTERVAL
4V
2V
0V
15A
10A
5A
0A
TIME (20ms/DIV)
FIGURE 4. OVER-CURRENT OPERATION
Over-Current Protection
The over-current function protects the converter from a
shorted output by using the upper MOSFETs on-resistance,
r_DS(ON) to monitor the current. This method enhances the
converter’s efficiency and reduces cost by eliminating a
current sensing resistor.
The over-current function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor (R_OCSET)
programs the over-current trip level. An internal 200µA
(typical) current sink develops a voltage across R_OCSET that
is reference to V_IN. When the voltage across the upper
MOSFET (also referenced to V_IN) exceeds the voltage
across R_OCSET, the over-current function initiates a soft-
start sequence. The soft-start function discharges C_SS with
a 10µA current sink and inhibits PWM operation. The soft-
start function recharges C_SS, and PWM operation resumes
with the error amplifier clamped to the SS voltage. Should an
overload occur while recharging C_SS, the soft start function
inhibits PWM operation while fully charging C_SS to 4V to
complete its cycle. Figure 4 shows this operation with an
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