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HD-4702 Datasheet, PDF (5/8 Pages) Intersil Corporation – CMOS Programmable Bit Rate Generator
HD-4702/883
AC PARAMETER
TABLE 3. ELECTRICAL PERFORMANCE SPECIFICATIONS
SYMBOL
CONDITIONS NOTES TEMPERATURE (oC) MIN
MAX UNITS
Input Capacitance
Output Capacitance
CIN
All Measurements
10
are referenced to
CO
device ground,
10
f = 1MHz.
TA = 25
TA = 25
-
7.0
pF
-
15.0
pF
Propagation Delay IX to CO
tPLH
10, 12
-55 ≤ TA ≤ 125
-
300
ns
Propagation Delay IX to CO
tPHL
10, 12
-55 ≤ TA ≤ 125
-
250
ns
Propagation Delay CP to CO
tPLH
10, 12
-55 ≤ TA ≤ 125
-
215
ns
Propagation Delay CP to CO
tPHL
10, 12
-55 ≤ TA ≤ 125
-
195
ns
Propagation Delay CO to Qn
Propagation Delay CO to Qn
tPLH
tPHL
VCC = 4.5V
CL ≤ 7pF on OX
CL = 15pF
10, 12
10, 12
-55 ≤ TA ≤ 125
-55 ≤ TA ≤ 125
- (Note 11) ns
- (Note 11) ns
Propagation Delay CO to Z
tPLH
10, 12
-55 ≤ TA ≤ 125
-
75
ns
Propagation Delay CO to Z
tPHL
10, 12
-55 ≤ TA ≤ 125
-
65
ns
Output Transition Time (Except OX)
tTLH
10, 12
-55 ≤ TA ≤ 125
-
80
ns
Output Transition Time (Except OX)
tTHL
10, 12
-55 ≤ TA ≤ 125
-
40
ns
NOTES:
10. The parameters listed in Table 3 are controlled via design or process parameters and are not directly tested. These parameters are
characterized upon initial design and after major process and/or design changes.
11. For multichannel operation, Propagation Delay (CO to Qn) plus Set-Up Time, Select to CO, is guaranteed to be ≤ 367ns.
12. Propagation Delays (tPLH and tPHL) and Output Transition Times (tTLH and tTHL) will change with Output Load Capacitance (CL).
Set-Up Times (tS), Hold Times (tH), and Minimum Pulse Widths (tW) do not vary with load capacitance.
TABLE 4. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
Initial Test
Interim Test
PDA
Final Test
Group A
Groups C and D
METHOD
100%/5004
100%/5004
100%
100%
-
Samples/5005
SUBGROUPS
-
1, 7, 9
1
2, 3, 8A, 8B, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11
1, 7, 9
5