ISL5957_15 Datasheet, PDF (4/14 Pages) Intersil Corporation – 14-Bit, +3.3V, 260+MSPS, High Speed D/A Converter

ISL5957
Absolute Maximum Ratings
Digital Supply Voltage DV_DD to DCOM . . . . . . . . . . . . . . . . . +3.6V
Analog Supply Voltage AV_DD to ACOM. . . . . . . . . . . . . . . . . . +3.6V
Grounds, ACOM TO DCOM . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V
Digital Input Voltages (D9-D0, CLK, SLEEP). . . . . . . . DV_DD + 0.3V
Reference Input Voltage Range. . . . . . . . . . . . . . . . . . AV_DD + 0.3V
Analog Output Current (I_OUT) . . . . . . . . . . . . . . . . . . . . . . . . . 24mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C
Thermal Information
Thermal Resistance (Typical, Note 1)
_JA(°C/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
75
TSSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . .
110
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. _JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER
SYSTEM PERFORMANCE
Resolution
Integral Linearity Error, INL
Differential Linearity Error, DNL
Offset Error, I_OS
Offset Drift Coefficient
AV_DD = DV_DD = +3.3V, V_REF = Internal 1.2V, IOUTFS = 20mA, T_A = 25°C for All Typical Values
T_A = -40°C TO 85°C
TEST CONDITIONS
MIN TYP MAX
“Best Fit” Straight Line (Note 8)
(Note 8)
IOUTA (Note 8)
(Note 8)
14
-
-
-5
2.5
+5
-3
1.5
+3
-0.006
+0.006
-
0.1
-
Full Scale Gain Error, FSE
Full Scale Gain Drift
With External Reference (Notes 2, 8)
With Internal Reference (Notes 2, 8)
With External Reference (Note 8)
-3
0.5
+3
-3
0.5
+3
-
50
-
With Internal Reference (Note 8)
-
100
-
Full Scale Output Current, I_FS
Output Voltage Compliance Range
(Note 3)
2
-
20
-1.0
-
1.25
DYNAMIC CHARACTERISTICS
Maximum Clock Rate, f_CLK
Output Rise Time
Full Scale Step
260 300
-
-
1.5
-
Output Fall Time
Full Scale Step
-
1.5
-
Output Capacitance
-
10
-
Output Noise
IOUTFS = 20mA
-
50
-
IOUTFS = 2mA
-
30
-
AC CHARACTERISTICS (Using Figure 13 with R_DIFF = 50 and R_LOAD = 50, Full Scale Output = -2.5dBm
Spurious Free Dynamic Range,
SFDR Within a Window
f_CLK = 210MSPS, f_OUT = 80.8MHz, 30MHz Span (Notes 4, 8)
f_CLK = 210MSPS, f_OUT = 40.4MHz, 30MHz Span (Notes 4, 8)
-
73
-
-
82
-
f_CLK = 130MSPS, f_OUT = 20.2MHz, 20MHz Span (Notes 4, 8)
-
86
-
UNITS
Bits
LSB
LSB
% FSR
ppm
FSR/°C
% FSR
% FSR
ppm
FSR/°C
ppm
FSR/°C
mA
V
MHz
ns
ns
pF
pA/ Hz
pA/ Hz
dBc
dBc
dBc
4
FN6080.2
September 29, 2015