ISL45041_14 Datasheet, PDF (4/8 Pages) Intersil Corporation – TFT-LCD I2C Programmable VCOM Calibrator

ISL45041
Electrical Specifications Test Conditions: V_DD = 3.3V, AV_DD = 18V, R_SET = 5kΩ, R1 = 10kΩ, R2 = 10kΩ; (See Figure 2) Unless otherwise
specified. Typicals are at T_A = +25°C. Boldface limits apply across the operating temperature range, 0°C to +85°C. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
(Note 6)
MAX
TYP (Note 6) UNITS
SDA, SCL Input Logic High
SDA, SCL Input Logic Low
I²CV_IH
I²CV_IL
0.7*V_DD
V
0.55
V
SDA, SCL Hysteresis
(Note 9)
260
mV
SDA Output Logic High
SDA Output Logic Low
WP Input Logic High
WP Input Logic Low
WP Hysteresis
WP Input Current
I²C Timing
VOH_S
VOL_S
V_IH
V_IL
IL_WPN
at 3mA
(Note 9)
V_DD - 0.4
0.7*V_DD
0.20
V
0.4
V
V
0.3*V_DD V
0.14V_DD
V
35
µA
SCL Clock Frequency
I²C Clock High Time
I²C Clock Low Time
I²C Spike Rejection Filter Pulse Width
I²C Data Set Up Time
I²C Data Hold Time
I²C SDA, SCL Input Rise Time
I²C SDA, SCL Input Fall Time
I²C Bus Free Time Between Stop and Start
I²C Repeated Start Condition Set-up
I²C Repeated Start Condition Hold
I²C Stop Condition Set-up
I²C Bus Capacitive Load
f_SCL
t_SCH
t_SCL
t_DSP
t_SDS
t_SDH
t_ICR
t_ICF
t_BUF
t_STS
t_STH
t_SPS
Cb
Dependent on Load (Note 10)
(Note 10)
0
400 kHz
0.6
µs
1.3
µs
0
50
ns
100
ns
900
ns
20 + 0.1*Cb 1000 ns
20 + 0.1*Cb 300 ns
200
µs
0.6
µs
0.6
µs
0.6
µs
400 pF
SDA Pin Capacitance
C_SDA
10
pF
SCL Pin Capacitance
C_S
10
pF
EEPROM Write Cycle Time
t_W
100 ms
NOTES:
6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
7. I_DD current may increase to 2mA for 45ms or less during each EEPROM programming operation.
8. I_AVDD current may increase to 1mA for 30ms or less during each EEPROM programming operation.
9. Simulated and Determined via Design and NOT Directly Tested.
10. Simulated and Designed According to I²C Specifications.
11. A typical Current of 20µA is Calculated using AV_DD = 10V and R_SET = 24.9kΩ. Reference “R_SET Resistor” in Figure 3.
12. Minimum value of R_SET resistor guaranteed when: AV_DD = 15V, V_DD = 3.0V and when voltage on the VOUT pin is greater than 2.5V. Reference Equation 2
on page 5 with Setting = 128.
Submit Document Feedback
4
FN6189.5
October 30, 2014