ISL29030A Datasheet, PDF (4/16 Pages) Intersil Corporation – Low Power Ambient Light and Proximity Sensor with Intelligent Interrupt

ISL29030A
Electrical Specifications V_DD = 3.0V, T_A = +25°C, R_EXT = 499kΩ 1% tolerance. (Continued)
PARAMETER
DESCRIPTION
CONDITION
MIN TYP MAX UNIT
DATA_{PROX_0} Prox Measurement w/o Object in Path
1
2 Counts
DATA_{PROX_F} Full Scale Prox ADC Code
255 Counts
DATA_{PROX_1} Prox Measurement Result
(Note 7)
35 46 57 Counts
t_r
Rise Time for IRDR Sink Current
R_LOAD = 15Ω at IRDR pin, 20% to 80%
500
ns
t_f
Fall time for IRDR Sink Current
R_LOAD = 15Ω at IRDR pin, 80% to 20%
500
ns
I_{IRDR_0} IRDR Sink Current
PROX_DR = 0; V_IRDR = 0.5V
98 110 120 mA
I_{IRDR_1} IRDR Sink Current
PROX_DR = 1; V_IRDR = 0.5V
220
mA
I_{IRDR_LEAK} IRDR Leakage Current
PROX_EN = 0; V_DD = 3.63V (Note 8)
-1 0.001 1
µA
V_IRDR Acceptable Voltage Range on IRDR Pin
Register bit PROX_DR = 0
0.5
4.3
V
t_PULSE Net I_IRDR On Time Per PROX Reading
100
µs
V_REF
F_I2C
V_I2C
Voltage of R_EXT Pin
I²C Clock Rate Range
Supply Voltage Range for I²C Interface
0.51
V
400 kHz
1.7
3.63 V
V_IL
SCL and SDA Input Low Voltage
0.55 V
V_IH
SCL and SDA Input High Voltage
1.25
V
I_SDA
SDA Current Sinking Capability
V_OL = 0.4V
3
5
mA
I_INT
INT Current Sinking Capability
V_OL = 0.4V
3
5
mA
PSRR_IRDR (ΔI_IRDR)/(ΔV_IRDR)
PROX_DR = 0; V_IRDR = 0.5V to 4.3V
4
mA/V
NOTES:
6. An LED is used in production test. The LED irradiance is calibrated to produce the same DATA count against a fluorescent light
source of the same lux level.
7. An 850nm infrared LED is used to test PROX/IR sensitivity in an internal test mode.
8. Ability to guarantee I_IRDR leakage of ~1nA is limited by test hardware.
9. For ALS applications under light-distorting glass, please see the section titled ALS Range 1 Considerations.
I2C Electrical Specifications For SCL and SDA unless otherwise noted, V_DD = 3V, T_A = +25°C, R_EXT = 499kΩ 1%
tolerance (Note 10).
PARAMETER
DESCRIPTION
V_I2C
Supply Voltage Range for I²C Interface
f_SCL
SCL Clock Frequency
V_IL
SCL and SDA Input Low Voltage
V_IH
SCL and SDA Input High Voltage
V_hys
Hysteresis of Schmitt Trigger Input
V_OL
Low-level Output Voltage (Open-drain) at
4mA Sink Current
CONDITION
MIN
1.7
1.25
0.05V_DD
TYP MAX UNIT
3.63 V
400 kHz
0.55 V
V
V
0.4 V
I_i
Input Leakage for each SDA, SCL Pin
t_SP
Pulse Width of Spikes that must be
Suppressed by the Input Filter
-10
10 µA
50 ns
t_AA
SCL Falling Edge to SDA Output Data Valid
C_i
Capacitance for each SDA and SCL Pin
t_HD:STA Hold Time (Repeated) START Condition After this period, the first clock pulse
600
is generated
900 ns
10 pF
ns
4
FN7722.0
November 18, 2010