ISL29027_14 Datasheet, PDF (4/13 Pages) Intersil Corporation – Proximity Sensor with Intelligent Interrupt and Sleep Modes

ISL29027
Electrical Specifications V_DD = 3.0V, T_A = +25°C, R_EXT = 499kΩ 1% tolerance. (Continued)
PARAMETER
DESCRIPTION
CONDITION
MIN
MAX
(Note 9) TYP (Note 9) UNIT
PSRR_IRDR (ΔI_IRDR)/(ΔV_IRDR)
PROX_DR = 0; V_IRDR = 0.5V to 4.3V
4
mA/V
NOTES:
7. An 850nm infrared LED is used to test PROX/IR sensitivity in an internal test mode.
8. Ability to guarantee I_IRDR leakage of ~1nA is limited by test hardware..
9. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
I²C Electrical Specifications For SCL and SDA unless otherwise noted, V_DD = 3V, T_A = +25°C, R_EXT = 499kΩ 1% tolerance
(Note 10).
PARAMETER
V_I2C
f_SCL
V_IL
V_IH
V_hys
V_OL
DESCRIPTION
Supply Voltage Range for I²C Interface
SCL Clock Frequency
SCL and SDA Input Low Voltage
SCL and SDA Input High Voltage
Hysteresis of Schmitt Trigger Input
Low-level Output Voltage (Open-drain) at 4mA Sink
Current
CONDITION
MIN
1.7
1.25
0.05V_DD
TYP MAX UNIT
3.63 V
400 kHz
0.55 V
V
V
0.4 V
I_i
Input Leakage for each SDA, SCL Pin
t_SP
Pulse Width of Spikes that must be Suppressed by
the Input Filter
-10
10 µA
50 ns
t_AA
SCL Falling Edge to SDA Output Data Valid
C_i
Capacitance for each SDA and SCL Pin
t_HD:STA Hold Time (Repeated) START Condition
After this period, the first clock pulse is
600
generated
900 ns
10 pF
ns
t_LOW
LOW Period of the SCL Clock
Measured at the 30% of VDD crossing
1300
ns
t_HIGH
HIGH period of the SCL Clock
600
ns
t_SU:STA
Set-up Time for a Repeated START Condition
600
ns
t_HD:DAT Data Hold Time
30
ns
t_SU:DAT
Data Set-up Time
100
ns
t_R
Rise Time of both SDA and SCL Signals
(Note 11)
20 + 0.1xC_b
ns
t_F
Fall Time of both SDA and SCL Signals
(Note 11)
20 + 0.1xC_b
ns
t_SU:STO
Set-up Time for STOP Condition
600
ns
t_BUF
Bus Free Time Between a STOP and START
Condition
1300
ns
C_b
Capacitive Load for Each Bus Line
R_pull-up SDA and SCL System Bus Pull-up Resistor
Maximum is determined by t_R and t_F
t_VD;DAT
Data Valid Time
t_VD:ACK Data Valid Acknowledge Time
V_nL
Noise Margin at the LOW Level
V_nH
Noise Margin at the HIGH Level
NOTES:
10. All parameters in I²C Electrical Specifications table are guaranteed by design and simulation.
11. Cb is the capacitance of the bus in pF.
1
0.1VDD
0.2VDD
400 pF
kΩ
0.9 µs
0.9 µs
V
V
4
FN7815.1
February 2, 2012