ISL23711 Datasheet, PDF (4/9 Pages) Intersil Corporation – Terminal Voltage +- 3V or +- 5V, 128 Taps IC Serial Interface

ISL23711
Operating Specifications Over the recommended operating conditions unless otherwise specified.
SYMBOL
I_CC1
I_V-
I_SB
I_V-SB
PARAMETER
TEST CONDITIONS
V_CC Supply Current, Volatile
Write/Read
f_SCL = 400kHz; SDA = Open; (for I²C, Active,
Read and Write states only)
V- Supply Current, Volatile Write/Read f_SCL = 400kHz; SDA = Open; (for I²C, Active,
Read and Write states only)
V_CC Current (Standby)
V- Current (Standby)
V_CC = +5.5V, I²C Interface in Standby State
V_CC = +3.6V, I²C Interface in Standby State
V- = -5.5V, I²C Interface in Standby State
V- = -2.7V, I²C Interface in Standby State
TYP
MIN (Note 1) MAX
200
-100
-1
500
300
-500
-300
-1
I_LkgDig
Leakage Current, at Pins SDA, SCL, Voltage at pin from GND to V_CC
A0, and A1
-10
10
t_DCP
DCP Wiper Response Time
SCL falling edge of last bit of DCP Data Byte to
1
(Note 13)
wiper change
Vpor
Power-on Recall for V_CC
2.5
SERIAL INTERFACE SPECS
V_IL
A0, A1, SDA, and SCL Input Buffer
LOW Voltage
-0.3
0.3*V_CC
V_IH
A0, A1, SDA, and SCL Input Buffer
HIGH Voltage
0.7*V_CC
V_CC+
0.3
Hysteresis SDA and SCL Input Buffer Hysteresis
V_OL
SDA Output Buffer LOW Voltage,
Sinking 4mA
0.05*
V_CC
0
0.4
Cpin A0, A1, SDA, and SCL Pin
10
(Note 14) Capacitance
f_SCL
SCL Frequency
400
t_IN
Pulse Width Suppression Time at SDA Any pulse narrower than the max spec is
50
and SCL Inputs
suppressed
t_AA
SCL Falling Edge to SDA Output Data SCL falling edge crossing 30% of V_CC, until SDA
900
Valid
exits the 30% to 70% of V_CC window
t_BUF
Time the Bus Must be Free Before the SDA crossing 70% of V_CC during a STOP
Start of a New Transmission
condition, to SDA crossing 70% of V_CC during
the following START condition
1300
t_LOW
t_HIGH
t_SU:STA
Clock LOW Time
Clock HIGH Time
START Condition Setup Time
t_HD:STA START Condition Hold Time
t_SU:DAT Input Data Setup Time
t_HD:DAT Input Data Hold Time
t_SU:STO STOP Condition Setup Time
t_HD:STO STOP Condition Setup Time
Measured at the 30% of V_CC crossing
Measured at the 70% of V_CC crossing
SCL rising edge to SDA falling edge. Both
crossing 70% of V_CC
From SDA falling edge crossing 30% of V_CC to
SCL falling edge crossing 70% of V_CC
From SDA exiting the 30% to 70% of V_CC
window, to SCL rising edge crossing 30% of V_CC
From SCL rising edge crossing 70% of V_CC to
SDA entering the 30% to 70% of V_CC window
From SCL rising edge crossing 70% of V_CC, to
SDA rising edge crossing 30% of V_CC
From SDA rising edge to SCL falling edge. Both
crossing 70% of V_CC
1300
600
600
600
100
0
600
600
UNIT
µA
µA
nA
nA
nA
nA
µA
µs
V
V
V
V
V
pF
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4
FN6127.0
August 16, 2005