HFA1112_14 Datasheet, PDF (4/14 Pages) Intersil Corporation – 850MHz, Low Distortion Programmable Gain Buffer Amplifiers

HFA1112
Electrical Specifications V_SUPPLY = ±5V, A_V = +1, R_L = 100Ω, Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
TEMP (^oC)
MIN
TYP
MAX
Rise Time
A_V = -1
25
(V_OUT = 2V Step)
A_V = +1
25
A_V = +2
25
Overshoot
A_V = -1
25
(V_OUT = 0.5V Step, Input t_R/t_F = 200ps,
Notes 2, 3, 4)
A_V = +1
25
A_V = +2
25
0.1% Settling Time (Note 3)
V_OUT = 2V to 0V
25
0.05% Settling Time
V_OUT = 2V to 0V
25
Overdrive Recovery Time
V_IN = 5V_P-P
25
Differential Gain
A_V = +1, 3.58MHz, R_L = 150Ω
25
A_V = +2, 3.58MHz, R_L = 150Ω
25
Differential Phase
A_V = +1, 3.58MHz, R_L = 150Ω
25
A_V = +2, 3.58MHz, R_L = 150Ω
25
NOTES:
-
0.82
-
-
1.06
-
-
1.00
-
-
12
30
-
45
65
-
6
20
-
11
-
-
15
-
-
8.5
-
-
0.03
-
-
0.02
-
-
0.05
-
-
0.04
-
2. This parameter is not tested. The limits are guaranteed based on lab characterization, and reflect lot-to-lot variation.
3. See Typical Performance Curves for more information.
4. Overshoot decreases as input transition times increase, especially for A_V = +1. Please refer to Typical Performance Curves.
UNITS
ns
ns
ns
%
%
%
ns
ns
ns
%
%
Degrees
Degrees
Application Information
Closed Loop Gain Selection
The HFA1112 features a novel design which allows the user
to select from three closed loop gains, without any external
components. The result is a more flexible product, fewer part
types in inventory, and more efficient use of board space.
This “buffer” operates in closed loop gains of -1, +1, or +2, and
gain selection is accomplished via connections to the ±inputs.
Applying the input signal to +IN and floating -IN selects a gain
of +1, while grounding -IN selects a gain of +2. A gain of -1 is
obtained by applying the input signal to -IN with +IN grounded.
The table below summarizes these connections:
Terminated microstrip signal lines are recommended at the
input and output of the device. Capacitance directly on the
output must be minimized, or isolated as discussed in the
next section.
For unity gain applications, care must also be taken to
minimize the capacitance to ground seen by the amplifier’s
inverting input. At higher frequencies this capacitance will
tend to short the -INPUT to GND, resulting in a closed loop
gain which increases with frequency. This will cause
excessive high frequency peaking and potentially other
problems as well.
An example of a good high frequency layout is the
Evaluation Board shown in Figure 2.
GAIN
(A_CL)
-1
+1
+2
CONNECTIONS
+INPUT (PIN 3)
-INPUT (PIN 2)
GND
Input
Input
NC (Floating)
Input
GND
PC Board Layout
The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The
use of low inductance components such as chip
resistors and chip capacitors is strongly recommended,
while a solid ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10µF) tantalum in parallel with a small value
(0.1µF) chip capacitor works well in most cases.
Driving Capacitive Loads
Capacitive loads, such as an A/D input, or an improperly
terminated transmission line will degrade the amplifier’s
phase margin resulting in frequency response peaking and
possible oscillations. In most cases, the oscillation can be
avoided by placing a resistor (R_S) in series with the output
prior to the capacitance.
Figure 1 details starting points for the selection of this
resistor. The points on the curve indicate the R_S and C_L
combinations for the optimum bandwidth, stability, and
settling time, but experimental fine tuning is recommended.
Picking a point above or to the right of the curve yields an
overdamped response, while points below or left of the curve
indicate areas of underdamped performance.
R_S and C_L form a low pass network at the output, thus
limiting system bandwidth well below the amplifier
bandwidth of 850MHz. By decreasing R_S as C_Lincreases
4