CD54AC00F3A Datasheet, PDF (4/4 Pages) Intersil Corporation – Quad 2-Input NAND Gate

CD54AC00F3A, CD54ACT00F3A
Switching Specifications Input t_r, t_f = 3ns, C_L = 50pF (Worst Case)
PARAMETER
AC TYPES
Propagation Delay, Input to Output
Input Capacitance
Power Dissipation Capacitance
ACT TYPES
SYMBOL
V_CC (V)
t_PLH, t_PHL
C_I
C_PD (Note 11)
1.5
3.3 (Note 9)
5 (Note 10)
-
-
-55^oC TO 125^oC
MIN
TYP
MAX
UNITS
-
-
91
ns
3.1
-
10.2
ns
2.2
-
7.3 (Note 8)
ns
-
-
10
pF
-
45
-
pF
Propagation Delay, Input to Output
t_PLH
5 (Note 10)
3.2
-
10.8 (Note 8)
ns
t_PHL
4
-
13.2 (Note 8)
ns
Input Capacitance
C_I
-
-
-
10
pF
Power Dissipation Capacitance
C_PD (Note 11)
-
-
45
-
pF
NOTES:
8. Limits tested at 100%.
9. 3.3V Min at 3.6V, Max at 3V.
10. 5V Min at 5.5V, Max at 4.5V
11. CAACC_PD:TP:isPDu_D=s=eVdVCt_CCo_C2d_{2fei ft(i}eC(rC_Pm_DPin_D+e+CthCLe)_Ld) y+nVa_Cm_Cic_∆pIo_Cw_Cewr _hceornesufim=pintiopnutpfererqguaeten.cy, _{CL = output load capacitance, VCC = supply voltage.}
Burn-In Test Circuit Connections (Use DC II for F3A Burn-In and AC for Life Test)
DC
CD54AC/ACT00
OPEN
3, 6, 8, 11
DC BURN-IN I
GROUND
1, 2, 4, 5, 7, 9, 10,
12, 13
V_CC (6V)
14
AC
CD54AC/ACT00
OPEN
-
GROUND
7
1/2 V_CC (3V)
3, 6, 8, 11
NOTE: Each pin except V_CC and Gnd will have a resistor of 2kΩ-47kΩ.
OPEN
3, 6, 8, 11
V_CC (6V)
14
DC BURN-IN II
GROUND
7
V_CC (6V)
1, 2, 4, 5, 9, 10,
12 - 14
OSCILLATOR
50kHz
25kHz
1, 2, 4, 5, 9, 10,
-
12, 13
OUTPUT
DUT
R_L (NOTE)
500Ω
OUTPUT
LOAD
C_L
50pF
NOTE: For AC Series Only: When V_CC = 1.5V, R_L = 1kΩ.
CD54AC CD54ACT
Input Level
Input Switching Voltage, V_S
Output Switching Voltage, V_S
V_CC
0.5 V_CC
0.5 V_CC
3V
1.5V
0.5 V_CC
FIGURE 1. PROPAGATION DELAY TIMES
t_r = 3ns
INPUT
LEVEL
V_I
V_O
t_PHL
t_f = 3ns
90%
V_S
10%
GND
V_S
t_PLH
FIGURE 2. WAVEFORMS
4