CA3094 Datasheet, PDF (4/14 Pages) Intersil Corporation – 30MHz, High Output Current Operational Transconductance Amplifier (OTA)

CA3094, CA3094A, CA3094B
Operating Considerations
The “Sink” Output (Terminal 8) and the “Drive” Output
(Terminal 6) of the CA3094 are not inherently current (or
power) limited. Therefore, if a load is connected between
Terminal 6 and Terminal 4 (V- or Ground), it is important to
connect a current limiting resistor between Terminal 8 and
Terminal 7 (V+) to protect transistor Q13 under shorted load
conditions. Similarly, if a load is connected between Terminal
8 and Terminal 7 (V+), the current limiting resistor should be
connected between Terminal 6 and Terminal 4 or ground. In
circuit applications where the emitter of the output transistor
is not connected to the most negative potential in the
system, it is recommended that a 100Ω current limiting
resistor be inserted between Terminal 7 and the V+ supply.
1/F Noise Measurement Circuit
When using the CA3094, A, or B audio amplifier circuits, it is
frequently necessary to consider the noise performance of the
device. Noise measurements are made in the circuit shown in
Figure 20. This circuit is a 30dB, non-inverting amplifier with
emitter follower output and phase compensation from
Terminal 2 to ground. Source resistors (R_S) are set to 0Ω or
1MΩ for E noise and I noise measurements, respectively.
These measurements are made at frequencies of 10Hz,
100Hz and 1kHz with a 1Hz measurement bandwidth. Typical
values for 1/f noise at 10Hz and 50µA I_ABC are:
E_N = 18nV ⁄ Hz and I_N = 1.8pA ⁄ Hz .
Test Circuits
2
100Ω
3
100Ω
15V
30V
7
300kΩ
5
9.9kΩ
CA3094
6
1
8
4
10kΩ
1kΩ
100pF
E_OUT
30V
NOTES:
3. Input Offset Voltage:
VIO
=
E_{----1-O---0--U-0----T-- .}
4. For Power Supply Rejection Test: (1) vary V+ by -2V; then (2)
vary V- by +2V.
5. Equations:
(1) V+ Rejection = ^E-----⁰----^O-----^U----^T--₂---₀-–---₀-^E----¹----^O-----^U-----^T--
(2) V- Rejection = ^E-----⁰----^O-----^U----^T--₂---₀-–---₀-^E----²----^O-----^U-----^T--
6. Power Supply Rejection: (dB) = 20log -_V----_R----_E-----_J---_E-----^1C----_T-----_I--_O-----_N----_†--- .
† Maximum Reading of Step 1 or Step 2
FIGURE 1. INPUT OFFSET VOLTAGE AND POWER SUPPLY REJECTION TEST CIRCUIT
30V
2
3
1MΩ
7
R_ABC
5
8
CA3094
6
1
150kΩ
4
220Ω
0.001µF
1MΩ
E_OUT
15V
30V
7
300kΩ
5
2
-
CA3094A
15V
3
+
4
NOTES:
7. P_DISSIPATION = (V+)(I)
8. IOS = ₁----₀---₆-^E---_V--^O_--A------O--^U_-M-------_L--^T_{--P----T----S----S----}
FIGURE 2. INPUT OFFSET CURRENT TEST CIRCUIT
NOTE: II = ₂-^I-
FIGURE 3. INPUT BIAS CURRENT TEST CIRCUIT
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