X9241A Datasheet, PDF (3/16 Pages) Xicor Inc. – Quad Digitally Controlled Potentiometer (XDCP)

X9241A
Ordering Information (Continued)
PART NUMBER
PART MARKING
X9241AUP
X9241AUP
X9241AUPZ (Note)
X9241AUP Z
X9241AUPI
X9241AUPI
X9241AUPIZ (Note)
X9241AUPI Z
X9241AUS*
X9241AUS
X9241AUSZ* (Note)
X9241AUS Z
X9241AUSI*
X9241AUSI
X9241AUSIZ* (Note)
X9241AUSI Z
X9241AUV*
X9241AUV
X9241AUVZ* (Note)
X9241AUV Z
X9241AUVI*
X9241AUVI
X9241AUVIZ* (Note)
X9241AUVI Z
*Add "T1" suffix for tape and reel.
V_CC LIMITS
(V)
5 ±10%
POTENTIOMETER
ORGANIZATION
(K)
50
TEMP RANGE
(°C)
0 to 70
0 to 70
-40 to 85
-40 to 85
0 to 70
0 to 70
-40 to 85
-40 to 85
0 to 70
0 to 70
-40 to 85
-40 to 85
PACKAGE
20 Ld PDIP
20 Ld PDIP (Pb-free)
20 Ld PDIP
20 Ld PDIP (Pb-free)
20 Ld SOIC
20 Ld SOIC (Pb-free)
20 Ld SOIC
20 Ld SOIC (Pb-free)
20 Ld TSSOP
20 Ld TSSOP (Pb-free)
20 Ld TSSOP
20 Ld TSSOP (Pb-free)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Pin Descriptions
Host Interface Pins
Serial Clock (SCL)
The SCL input is used to clock data into and out of the
X9241A.
Serial Data (SDA)
SDA is a bidirectional pin used to transfer data into and out
of the device. It is an open drain output and may be wire-
ORed with any number of open drain or open collector
outputs. An open drain output requires the use of a pull-up
resistor. For selecting typical values, refer to the guidelines
for calculating typical values on the bus pull-up resistors
graph.
Address
The Address inputs are used to set the least significant 4 bits
of the 8-bit slave address. A match in the slave address
serial data stream must be made with the Address input in
order to initiate communication with the X9241A.
Potentiometer Pins
V_H/R_H(V_H0/R_H0—V_H3/R_H3), V_L/R_L (V_L0/R_L0—V_L3/R_L3)
The R_H and R_L inputs are equivalent to the terminal
connections on either end of a mechanical potentiometer.
V_W/R_W (V_W0/R_W0—V_W3/R_W3)
The wiper outputs are equivalent to the wiper output of a
mechanical potentiometer.
Pin Configuration
DIP/SOIC/TSSOP
V_W0/R_W0
V_L0/R_L0
V_H0/R_H0
A0
A2
V_W1/R_W1
V_L1/R_L1
V_H1/R_H1
SDA
V_SS
1
20
2
19
3
18
4
17
5
16
X9241A
6
15
7
14
8
13
9
12
10
11
V_CC
V_W3/R_W3
V_L3/R_L3
V_H3/R_H3
A1
A3
SCL
V_W2/R_W2
V_L2/R_L2
V_H2/R_H2
Pin Names
SYMBOL
SCL
SDA
A0–A3
V_H0/R_H0–V_H3/R_H3,
V_L0/R_L0–V_L3/R_L3
V_W0/R_W0–V_W3/R_W3
DESCRIPTION
Serial Clock
Serial Data
Address
Potentiometer Pins (terminal equivalent)
Potentiometer Pins (wiper equivalent)
3
FN8164.1
September 15, 2005