X4043 Datasheet, PDF (3/24 Pages) Intersil Corporation – CPU Supervisor with 4kbit EEPROM

X4043, X4045
Ordering Information
PART NUMBER RESET PART
PART NUMBER
PART
V_CC
V_TRIP
TEMP
(ACTIVE LOW)
MARKING RESET (ACTIVE HIGH) MARKING RANGE (V) RANGE (V) RANGE (°C)
PACKAGE
X4043S8-2.7*
X4043 F
X4045S8-2.7*
X4045 F
2.7-5.5
2.55-2.7
0-70
8 Ld SOIC
X4043S8Z-2.7* (Note) X4043 Z F X4045S8Z-2.7* (Note) X4045 Z F
0-70
8 Ld SOIC (Pb-free)
X4043S8I-2.7
X4043 G
X4045S8I-2.7
X4045 G
-40-85 8 Ld SOIC
X4043S8IZ-2.7 (Note) X4043 Z G X4045S8IZ-2.7 (Note) X4045 Z G
-40-85 8 Ld SOIC (Pb-free)
X4043M8-2.7
ADG
X4045M8-2.7
ADP
0-70
8 Ld MSOP
X4043M8Z-2.7 (Note) DAX
X4045M8Z-2.7 (Note) DBF
0-70
8 Ld MSOP (Pb-free)
X4043M8I-2.7
ADH
X4045M8I-2.7
ADQ
-40-85 8 Ld MSOP
X4043M8IZ-2.7(Note) DAS
X4045M8IZ-2.7 (Note) DBB
-40-85 8 Ld MSOP (Pb-free)
X4043P-2.7
X4043P F X4045P-2.7
X4045P F
0-70
8 Ld PDIP
X4043PZ-2.7 (Note) X4043P Z F X4045PZ-2.7 (Note) X4045P Z F
0-70
8 Ld PDIP(Pb-free)
X4043PI-2.7
X4043P G X4045PI-2.7
X4045P G
-40-85 8 Ld PDIP
X4043PIZ-2.7 (Note) X4043P Z G X4045PIZ-2.7 (Note) X4045P Z G
-40-85 8 Ld PDIP
*Add "T1" suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3
FN8118.1
September 30, 2005