ISL78302_14 Datasheet, PDF (3/13 Pages) Intersil Corporation – Dual LDO with Low Noise, High Performance and Low IQ

Pin Configuration
ISL78302
ISL78302
(10 LD 3x3 DFN)
TOP VIEW
VIN 1
EN1 2
EN2 3
CBYP 4
CPOR ⁵
10 VO1
9 VO2
8 _POR2
7 POR1
6 GND
Pin Descriptions
PIN
PIN
NUMBER NAME
TYPE
1
VIN Analog I/O
2
EN1 Low Voltage Compatible CMOS Input
3
EN2 Low Voltage Compatible CMOS Input
4
CBYP Analog I/O
5
CPOR Analog I/O
6
GND Ground
7
POR1 Open-Drain Output (1mA)
8
POR2 Open-Drain Output (1mA)
9
VO2 Analog I/O
10
VO1 Analog I/O
DESCRIPTION
Supply Voltage/LDO Input. Connect a 1µF capacitor to GND.
LDO-1 Enable. ENABLE = HIGH
LDO-2 Enable. ENABLE = HIGH
Reference Bypass Capacitor Pin. Recommended to connect capacitor of value 0.01µF
between this pin and GND for optimum noise and PSRR performance.
POR2 Delay Setting Capacitor Pin. Connect a capacitor between this pin and GND to delay
the POR2 output release after LDO-2 output reaches 94% of its specified voltage level.
(200ms delay per 0.01µF).
GND is the connection to system ground. Connect to PCB Ground plane.
Open-drain POR Output for LDO-1 (active-low). Internally connected to VO1 through 100kΩ
resistor.
Open-drain POR Output for LDO-2 (active-low). Internally connected to VO2 through 100kΩ
resistor.
LDO-2 Output. Connect capacitor of value 1µF to 10µF to GND (1µF recommended).
LDO-1 Output. Connect capacitor of value 1µF to 10µF to GND (1µF recommended).
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
VO1 VOLTAGE
(V)
VO2 VOLTAGE
(V)
TEMP RANGE
(°C)
PACKAGE
(Pb-Free)
PKG
DWG. #
ISL78302ARFBZ
DNAB
2.5
1.5
-40 to +105
10 Ld 3x3 DFN L10.3x3C
ISL78302ARBFZ
DNAC
1.5
2.5
-40 to +105
10 Ld 3x3 DFN L10.3x3C
ISL78302ARNBZ
DNAD
3.3
1.5
-40 to +105
10 Ld 3x3 DFN L10.3x3C
ISL78302ARBNZ
DNAE
1.5
3.3
-40 to +105
10 Ld 3x3 DFN L10.3x3C
ISL78302ARNWZ
DNAF
3.3
1.2
-40 to +105
10 Ld 3x3 DFN L10.3x3C
ISL78302ARWCZ
DNAG
1.2
1.8
-40 to +105
10 Ld 3x3 DFN L10.3x3C
ISL78302ARFWZ
DNAH
2.5
1.2
-40 to +105
10 Ld 3x3 DFN L10.3x3C
ISL78302ARCWZ
DNAJ
1.8
1.2
-40 to +105
10 Ld 3x3 DFN L10.3x3C
ISL78302AR1AZ
DNAV
1.25
3.3
-40 to +105
10 Ld 3x3 DFN L10.3x3C
NOTES:
1. Add “-T*”suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL78302. For more information on MSL please see techbrief TB363.
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FN7696.6
November 6, 2014