ISL6730 Datasheet, PDF (3/19 Pages) Intersil Corporation – Reduce component size requirements

Block Diagram
EMI CHOKE
V_LINE
C_F3
C_F2
L_m
D_F1
D_F2
V_I
L
C_F1
R_CS
VCC
D
Q₁
C_OUT
C_REG
VREG
V_OUT
R_IN2
R_IN1
R_SEN
ISEN
ICOMP
Gmi
-0---.--2---5-----^×-----V-----I--N--- C O M P B
BO2
CURRENT
MIRROR
2:1
ICS
>
--I--O-----C----
2
ICS
OTP
I_REF
CEQ GEN.
VCS
=
-R----I--S------^×-----I--I--S-----E----N---
2
R_IS
UVLO
LINEAR
REGULATOR
VCC
CONTROL
LOGIC
PWM
COMP
SKIP
OSCILLATOR
SOFT-START
ENABLE
2.5V
VIN
COMPB _SKIP
COMP-1V _{OVER POWER}
CLAMP
LIMIT
Gmv
20µA
I_FB
SKIP
BO
C_BO
COMP
GATE
GND
FB
R_FB2
R_FB1