ISL6294A Datasheet, PDF (3/8 Pages) Intersil Corporation – High Input Voltage Charger

ISL6294A
Electrical Specifications Typical Values Are Tested at V_IN = 5V and the T_A at +25°C. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP MAX UNITS
LOGIC INPUT AND OUTPUTS
EN Pin Logic Input High
1.3
-
-
V
EN Pin Logic Input Low
-
-
0.5
V
EN Pin Internal Pull-Down Resistance
100
200
400
kΩ
CHG Sink Current when LOW
Pin Voltage = 1V
10
20
-
mA
CHG Leakage Current when HIGH
PPR Sink Current when LOW
V_CHG = 6.5V
Pin Voltage = 1V
-
-
10
20
1
µA
-
mA
PPR Leakage Current when HIGH
V_PPR 6 = 6.5V
-
-
1
µA
NOTES:
3. The 4.0V V_BAT is selected so that the CHG output can be used as the indication for the offset comparator output indication. If the V_BAT is lower
than the POR threshold, no output pin can be used for indication.
4. For junction temperature below +100°C.
5. The charge current can be affected by the thermal foldback function if the IC under the test setup cannot dissipate the heat.
6. Limits should be considered typical and are not production tested.
Pin Descriptions
VIN - Power input. The absolute maximum input voltage is
28V. A 0.47µF or larger value X5R ceramic capacitor is
recommended to be placed very close to the input pin for
decoupling purpose. Additional capacitance may be required
to provide a stable input voltage.
PPR - Open-drain power presence indication. The
open-drain MOSFET turns on when the input voltage is
above the POR threshold but below the OVP threshold and
off otherwise. This pin is capable to sink 10mA (minimum)
current to drive an LED. The maximum voltage rating for this
pin is 7V. This pin is independent of the EN pin input.
CHG - Open-drain charge indication pin. This pin outputs a
logic LOW when a charge cycle starts and turns to HIGH
when the end-of-charge (EOC) condition is qualified. This
pin is capable to sink 10mA minimum current to drive an
LED. When the charger is disabled, the CHG outputs high
impedance.
EN - Enable input. This is a logic input pin to disable or
enable the charger. Drive to HIGH to disable the charger.
When this pin is driven to LOW or left floating, the charger is
enabled. This pin has an internal 200kΩ pull-down resistor.
GND - System ground.
IMIN - End-of-charge (EOC) current program pin. Connect a
resistor between this pin and the GND pin to set the EOC
current. The EOC current IMIN can be programmed by
Equation 1:
I_MIN
=
-¹---¹---⁰----⁰---⁰--
R_IMIN
(mA)
(EQ. 1)
Where R_IMIN is in kΩ. The programmable range covers 5%
(or 10mA, whichever is higher) to 50% of IREF. When
programmed to less than 5% or 10mA, the stability is not
guaranteed.
IREF - Charge-current program and monitoring pin. Connect
a resistor between this pin and the GND pin to set the
charge current limit determined by Equation 2:
I_REF
=
-¹---²----⁰---⁸---⁹---
R_IREF
(mA)
(EQ. 2)
Where R_IREF is in kΩ. The IREF pin voltage also monitors
the actual charge current during the entire charge cycle,
including the trickle, constant-current, and constant-voltage
phases. When disabled, V_IREF = 0V.
BAT - Charger output pin. Connect this pin to the battery. A
1µF or larger X5R ceramic capacitor is recommended for
decoupling and stability purposes. When the EN pin is pulled
to logic HIGH, the BAT output is disabled.
EPAD - Exposed pad. Connect as much as possible copper
to this pad either on the component layer or other layers
through thermal vias to enhance the thermal performance.
3
FN6821.2
December 11, 2008