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ISL6161_14 Datasheet, PDF (3/11 Pages) Intersil Corporation – Dual Power Distribution Controller
ISL6161
Pin Descriptions
PIN NUMBER SYMBOL
FUNCTION
DESCRIPTION
1
12VS 12V Source
Connect to source of associated external N-Channel MOSFET switch to sense output
voltage.
2
12VG 12V Gate
Connect to the gate of associated N-Channel MOSFET switch. A capacitor from this node to
ground sets the turn-on ramp. At turn-on this capacitor will be charged to ~17.4V by a 10µA
current source.
3
VDD Chip Supply
Connect to 12V supply. This can be either connected directly to the +12V rail supplying the
load voltage or to a dedicated VDD +12V supply. If the former is chosen, special attention to
VDD decoupling must be paid to prevent sagging as heavy loads are switched on.
4
NC Not Connected
5
ENABLE Enable/Reset
ENABLE is used to turn-on and reset the chip. Both outputs turn-on when this pin is driven
low. After a current limit time-out, the chip is reset by the rising edge of a reset signal applied
to the ENABLE pin. This input has 100µA pull-up capability, which is compatible with 3V and
5V open drain and standard logic.
6
3VG 3V Gate
Connect to the gate of the external 3V N-Channel MOSFET. A capacitor from this node to
ground sets the turn-on ramp. At turn-on, this capacitor will be charged to ~11.4V by a 10µA
current source.
7
3VS 3 Source
Connect to the source side of 3V external N-Channel MOSFET switch to sense output
voltage.
8
3VISEN 3V Current Sense
Connect to the load side of the 3V sense resistor to measure the voltage drop across this
resistor between 3VS and 3VISEN pins.
9
PGOOD Power-Good indicator Indicates that all output voltages are within specification. PGOOD is driven by an open drain
N-Channel MOSFET. It is pulled low when any output is not within specification.
10
CTIM Current Limit Timing Connect a capacitor from this pin to ground. This capacitor controls the time between the
Capacitor
onset of current limit and chip shutdown (current limit time-out). The duration of current limit
time-out (in seconds) = 200kΩ x CTIM (Farads).
11
CPUMP Charge Pump
Capacitor
Connect a 0.1µF capacitor between this pin and VDD (pin 3). Provides charge storage for
12VG drive.
12
GND Chip Ground
13
RILIM Current Limit Set
A resistor connected between this pin and ground determines the current level at which
Resistor
current limit is activated. This current is determined by the ratio of the RILIM resistor to the
sense resistor (RSENSE). The current at current limit onset is equal to
10µA x (RILIM/RSENSE). The ISL6161 is limited to a 10kΩ min. value (OC Vth = 100mV)
resistor whereas the ISL6161 can accommodate a 5kΩ resistor for a lower OC Vth (50mV).
14
12VISEN 12V Current Sense Connect to the load side of sense resistor to measure the voltage drop across this resistor.
3
FN9104.4
October 2, 2008