ISL54103 Datasheet, PDF (3/7 Pages) Intersil Corporation – DDC Accelerator (DDCA)

ISL54103
Absolute Maximum Ratings
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . -1V to 6.5V
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +135°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage on Pins . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V_DD+0.3V
Lead Temperature (soldering, 10s) . . . . . . . . . . . . . . . . . . . . . 300°C
ESD Min Other Pins (HBM) . . . . . . . . . . . . . . . . . . . . . . . . . . . .>2kV
ESD DDC1 and DDC2 Pins (HBM) . . . . . . . . . . . . . . . . . . . . . .>8kV
Recommended Operating Conditions
Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
CAUTION: Absolute Maximum Ratings indicate limits beyond which permanent damage to the device and impaired reliability may occur. These are stress ratings
provided for information only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification are not implied.
For guaranteed specifications and test conditions, see Electrical Specifications. The guaranteed specifications apply only for the test conditions listed. Some
performance characteristics may degrade when the device is not operated under the listed test conditions.
Electrical Specifications Over all operating conditions unless otherwise specified, Typical values are measured at V_DD = 3.3V and
T_A = +25°C
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
ANALOG PARAMETERS
V_DD
Supply Voltage Range
V_{DD RAMP} V_DD Ramp Rate
I_DD
Supply Current
DDC1 = DDC2 = Open
I_{OUT_SB} Standby Pull-Up Current
DDC1 = DDC2 = V_DD - 1.0V
I_{OUT_A1} Active Pull-Up Current
DDC1 = GND; DDC2 = Open
I_{OUT_A2}
DDC1 = Open; DDC2 = GND
I_{OUT_B1} Boost Pull-Up Current (Figure 2) V_TRIPL < DDC1 < V_TRIPH, DDC2 = Open
I_{OUT_B2}
V_TRIPL < DDC2 < V_TRIPH, DDC1 = Open
V_TRIPL
Input Voltage Threshold Low
V_TRIPH Input Voltage Threshold High
f_MAX
DDC Max Frequency
NSS
Noise Spike Suppression
(Note Figure 1) (Figure 10)
2.7
0.05
80
80
125
275
125
275
1.6
2.2
1.6
2.2
0.65
0.75
V_DD - 0.60 V_DD - 0.50
20
5.5
50
100
125
350
350
0.85
V_DD - 0.40
100
V
V/ms
µA
µA
µA
µA
mA
mA
V
V
kHz
V-ns
NOTES:
1. Measured as area under triangular waveform above V_TRIPL, with time as base and V_IN as height (See Figure 10).
3
FN6303.1
June 22, 2006