ISL32173EIVZ-T Datasheet, PDF (3/22 Pages) Intersil Corporation – QUAD, 16.5kV ESD Protected, 3.0V to 5.5V, RS-485/RS-422 Receivers

ISL32173E, ISL32175E, ISL32177E, ISL32273E, ISL32275E, ISL32277E
Pin Descriptions
ISL32173E, ISL32175E, ISL32177E,
ISL32273E ISL32275E ISL32277E
PIN NUMBER PIN NUMBER PIN NUMBER
PIN
FUNCTION
4, 12
-
4, 15
EN, EN Group driver output enables, that are internally pulled high to
V_CC. All receiver outputs are enabled by driving EN high OR EN
low, and the outputs are all high impedance when EN is low AND
EN is high (i.e., if using only the active high EN, connect EN to
V_CC or V_L through a 1kΩ resistor; if using only the active low EN,
connect EN directly to GND). If the group enable function isn’t
required, connect EN to V_CC (or V_L) through a 1kΩ or greater
resistor, or connect EN directly to GND. (ISL32X73E and
ISL32X77E only)
-
4, 12
-
EN12, EN34 Paired driver output enables, that are internally pulled high to
V_CC. Driving EN12 (EN34) high enables the channel 1 and 2
(3 and 4) RO outputs. Driving EN12 (EN34) low disables the
channel 1 and 2 (3 and 4) outputs. If the enable function isn’t
required, connect EN12 and EN34 to V_CC (or V_L) through a 1kΩ
or greater resistor. (ISL32X75E only).
-
-
2, 3,
EN1, EN2, Individual receiver output enables that are internally pulled high
16, 17
EN3, EN4 to V_CC. Forcing ENX high (along with EN high OR EN low) enables
the channel X output (ROX). Driving ENX low disables the
channel X output, regardless of the states of EN and EN. If the
individual channel enable function isn’t required, connect ENX to
V_CC (or V_L) through a 1kΩ or greater resistor. (ISL32X77E only)
-
-
9
SHDNEN Low power SHDN mode enable that is internally pulled high to
V_CC. A high level allows the ISL32X77E to enter a low power
mode when all channels are disabled. A low level prevents the
device from entering the low power mode. (ISL32X77E only)
3, 5,
11, 13
3, 5,
11, 13
1, 6,
13, 18
RO1, RO2,
RO3, RO4
Channel X receiver output: If A - B ≥ 200mV, RO is high;
If A - B ≤ -200mV, RO is low. RO = High if A and B are unconnected
(floating).
8
8
10, PAD
GND
Ground connection. This is also the potential of the QFN thermal
pad.
2, 6,
10, 14
2, 6,
10, 14
24, 7,
12, 19
A1, A2,
A3, A4
±16.5kV IEC61000-4-2 ESD Protected RS-485/422 level,
channel X noninverting receiver input.
1, 7,
9, 15
1, 7,
9, 15
23, 8,
11, 20
B1, B2,
B3, B4
±16.5kV IEC61000-4-2 ESD Protected RS-485/422 level,
channel X inverting receiver input.
16
16
22
V_CC
System power supply input (3.0V to 5.5V). On devices with a V_L
pin powered from a separate supply, power up V_CC first.
-
-
21
V_L
Logic power supply input (1.4V to V_CC) that powers all the
TTL/CMOS inputs and outputs (logic pins). V_L sets the V_IH and
V_IL levels of the enable and SHDNEN pins, and sets the V_OH level
of the RO pins. Connect the V_L pin to the lower voltage power
supply of a logic device (e.g., UART or µcontroller) interfacing
with the ISL32X77E logic pins. If V_L and V_CC are different
supplies, power up this supply after V_CC, and keep V_L ≤ V_CC. To
minimize input current and SHDN supply current, logic pins that
are strapped high externally (preferably through a 1kΩ resistor)
should connect to V_CC, but they may also connect to V_L.
(ISL32X77E only)
-
-
5, 14
NC
No Connection.
3
FN7529.1
March 14, 2013