ISL22346 Datasheet, PDF (3/13 Pages) Intersil Corporation – Quad Digitally Controlled Potentiometers

ISL22346
Absolute Maximum Ratings
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage at any Digital Interface Pin
with Respect to GND . . . . . . . . . . . . . . . . . . . . . -0.3V to V_CC+0.3
V_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V
Voltage at any DCP Pin with Respect to GND. . . . . . . -0.3V to V_CC
Lead Temperature (Soldering, 10s) . . . . . . . . . . . . . . . . . . . . . 300°C
I_W (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA
Latchup (Note 4) . . . . . . . . . . . . . . . . . . Class II, Level B @ +125°C
ESD (HBM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5kV
(CDM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1kV
Thermal Information
Thermal Resistance (Typical, Note 3)
20 Lead TSSOP package . . . . . . . . . . . . . . . . . . . .
θ_JA (°C/W)
90
Recommended Operating Conditions
Temperature Range (Extended Industrial). . . . . . . .-40°C to +125°C
V_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Power Rating of each DCP . . . . . . . . . . . . . . . . . . . . . . . . . . . .5mW
Wiper Current of each DCP . . . . . . . . . . . . . . . . . . . . . . . . . . ±3.0mA
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
3. θ_JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
4. Jedec Class II pulse conditions and failure criterion used. Level B exceptions are: using a max positive pulse of 6.5V on the SHDN pin, and using
a max negative pulse of -0.8V for all pins.
Analog Specifications Over recommended operating conditions unless otherwise stated.
SYMBOL
PARAMETER
TEST CONDITIONS
TYP
MIN (NOTE 5) MAX
UNIT
R_TOTAL R_H to R_L Resistance
W option
U option
10
kΩ
50
kΩ
R_H to R_L Resistance Tolerance
End-to-End Temperature Coefficient
W and U option
W option
-20
+20
%
±50
ppm/°C
(Note 19)
U option
±80
ppm/°C
(Note 19)
V_RH, V_RL V_RH and V_RL Terminal Voltages
R_W
Wiper Resistance
C_H/C_L/C_W Potentiometer Capacitance
(Note 19)
V_RH and V_RL to GND
V_CC = 3.3V @ +25°C, wiper current =
V_CC/R_TOTAL
0
V_CC
V
70
200
Ω
10/10/25
pF
I_LkgDCP Leakage on DCP Pins
Voltage at pin from GND to V_CC
0.1
1
µA
VOLTAGE DIVIDER MODE (0V @ R_Li; V_CC @ R_Hi; measured at R_Wi, unloaded; i = 0, 1, 2, or 3)
INL
Integral Non-linearity
Monotonic over all tap positions
-1
(Note 10)
1
LSB
(Note 6)
DNL Differential Non-linearity
Monotonic over all tap positions
-0.5
(Note 9)
0.5
LSB
(Note 6)
ZSerror Zero-scale Error
(Note 7)
W option
U option
0
1
5
LSB
(Note 6)
0
0.5
2
FSerror Full-scale error
(Note 8)
W option
U option
-5
-1
0
LSB
(Note 6)
-2
-1
0
V_MATCH DCP to DCP Matching
(Note 11)
Any two DCPs at same tap position, same
-2
voltage at all R_H terminals, and same voltage
at all R_L terminals
TC_V
Ratiometric Temperature Coefficient DCP register set to 40 hex
±4
(Note 12)
2
LSB
(Note 6)
ppm/°C
RESISTOR MODE (Measurements between R_Wi and R_Li with R_Hi not connected, or between R_Wi and R_Hi with R_Li not connected. i = 0, 1, 2 or 3)
RINL Integral nOn-linearity
(Note 16)
DCP register set between 10h and 7Fh;
-1
monotonic over all tap positions
1
MI
(Note 13)
3
FN6177.0
July 28, 2006