HI1172_00 Datasheet, PDF (3/7 Pages) Intersil Corporation – 6-Bit, 20MSPS, Video A/D Converter (CMOS)

HI1172
Absolute Maximum Ratings T_A = 25^oC
Supply Voltage (V_DD). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V
Reference Voltage (V_RT, V_RB). . . . . . . . . . . . . . . . . . . . V_DD to V_SS
Analog Input Voltage (V_IN). . . . . . . . . . . . . . . . . . . . . . . V_DD to V_SS
Digital Input Voltage (CLK). . . . . . . . . . . . . . . . . . . . . . . V_DD to V_SS
Digital Output Voltage (V_OH, V_OL). . . . . . . . . . . . . . . . . V_DD to V_SS
Operating Conditions
Supply Voltage Range, AV_DD, AV_SS . . . . . . . . . . . . 4.75V to 5.25V
Reference Voltage, DV_DD, DV_SS
V_RT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.9V to 5V
V_RB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 4.1V
V_RT - V_RB. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.9V to AV_DD
Analog Input Voltage (V_IN). . . . . . . . . . . . . . . . . . . . . . . V_RB to V_RT
Clock Pulse Width
t_PW1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25ns (Min)
t_PW0 . . . . . . . . . .
Temperature Range
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. . . 25ns
-20^oC to
(Min)
75^oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θ_JA (^oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
120
Maximum Junction Temperature (Plastic Package) . . . . . . . .150^oC
Maximum Storage Temperature Range . . . . . . . . . . -65^oC to 150^oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300^oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θ_JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications V_DD = +5V, V_RB = 1V, V_RT = 2V, T_A = 25^oC
PARAMETER
SYMBOL
TEST CONDITIONS
Conversion Speed, f_C
Integral Non-Linearity
Differential Non-Linearity
Supply Current
f_C
V_IN = 1V to 2V
f_IN = 1kHz Ramp
E_L
f_C = 20MSPS
V_IN = 1V to 2V
E_D
f_C = 20MSPS
V_IN = 1V to 2V
I_DD
f_C = 20MSPS
NTSC Ramp Wave Input
Reference Pin Current
Analog Input (-1dB)
I_REF
BW
Analog Input Capacitance
Reference Resistance (V_RT to V_RB)
Offset Voltage
Digital Input Voltage
Digital Input Current
Digital Output Current
Output Data Delay
Differential Gain Error
C_IN
R_REF
E_OT
E_OB
V_IH
V_IL
I_IH
I_IL
I_OH
I_OL
T_DL
DG
V_IN = 1.5V + 0.07V_RMS
V_DD = Max
V_IH = V_DD
V_IL = 0V
V_DD = Min
V_OH = V_DD = 0.5V
V_OL = 0.4V
With TTL 1 Gate and 10pF Load
NTSC 40 IRE Mod
Differential Phase Error
Aperture Jitter
Sampling Delay
DP
Ramp, f_C = 14.3MSPS
t_AJ
t_SD
MIN
TYP
MAX UNITS
0.5
-
20
MSPS
-
±0.3
±0.5
LSB
-
±0.3
±0.5
LSB
-
7
12
mA
3
4
5.7
mA
-
18
-
MHz
-
4
-
pF
175
250
325
Ω
0
-20
-40
mV
15
35
55
mV
4.0
-
-
V
-
-
1.0
V
-
-
5
µA
-
-
5
µA
-1.1
-
-
mA
3.7
-
-
mA
-
18
30
ns
-
1.0
-
%
-
1.0
-
deg
-
40
-
ps
-
4
-
ns
3