CA3240_05 Datasheet, PDF (3/15 Pages) Intersil Corporation – Dual, 4.5MHz, BiMOS Operational Amplifier with MOSFET Input/Bipolar Output

CA3240, CA3240A
Electrical Specifications For Equipment Design, V_SUPPLY = ±15V, T_A = 25^oC, Unless Otherwise Specified (Continued)
TYPICAL VALUES
PARAMETER
SYMBOL
TEST CONDITIONS
CA3240A CA3240 UNITS
Equivalent Input Noise Voltage
(See Figure 18)
Short-Circuit Current to Opposite Supply
Gain Bandwidth Product (See Figures 13, 27)
Slew Rate (See Figure 14)
e_N
I_OM+
I_OM-
f_T
SR
f = 1kHz, R_S = 100Ω
f = 10kHz, R_S = 100Ω
Source
Sink
40
40 nV/√Hz
12
12 nV/√Hz
40
40
mA
11
11
mA
4.5
4.5
MHz
9
9
V/µs
Transient Response (See Figure 1)
Settling Time at 10V_P-P (See Figure 25)
t_r
R_L = 2kΩ, C_L = 100pF
OS
R_L = 2kΩ, C_L = 100pF
t_S
A_V = +1, R_L = 2kΩ, C_L = 100pF,
Voltage Follower
Rise Time
Overshoot
To 1mV
To 10mV
0.08
0.08
µs
10
10
%
4.5
4.5
µs
1.4
1.4
µs
Crosstalk (See Figure 22)
f = 1kHz
120
120
dB
Electrical Specifications For Equipment Design, at V_SUPPLY = ±15V, T_A = -40 to 85^oC, Unless Otherwise Specified
TYPICAL VALUES
PARAMETER
SYMBOL
CA3240A
CA3240
Input Offset Voltage
Input Offset Current (Note 8)
Input Current (Note 8)
Large Signal Voltage Gain (See Figures 12, 27), (Note 6)
|V_IO|
3
10
|I_IO|
32
32
I_I
640
640
A_OL
63
63
96
96
Common Mode Rejection Ratio (See Figure 17)
CMRR
32
32
90
90
Common Mode Input Voltage Range (See Figure 24)
Power Supply Rejection Ratio (See Figure 19)
V_ICR
PSRR
(∆V_IO/∆V±)
-15 to +12.3
150
76
-15 to +12.3
150
76
Maximum Output Voltage (Note 7) (See Figures 23, 24)
Supply Current (See Figure 15) Total For Both Amps
V_OM+
V_OM-
I+
12.4
-14.2
8.4
12.4
-14.2
8.4
Total Device Dissipation
Temperature Coefficient of Input Offset Voltage
NOTES:
P_D
252
252
∆V_IO/∆T
15
15
6. At V_O = 26V_P-P, +12V, -14V and R_L = 2kΩ.
7. At R_L = 2kΩ.
8. At T_A = 85^oC.
Electrical Specifications For Equipment Design, at V+ = 5V, V- = 0V, T_A = 25^oC, Unless Otherwise Specified
TYPICAL VALUES
PARAMETER
SYMBOL
CA3240A
CA3240
Input Offset Voltage
Input Offset Current
Input Current
Input Resistance
Large Signal Voltage Gain (See Figures 12, 27)
|V_IO|
2
5
|I_IO|
0.1
0.1
I_I
2
2
R_IN
1
1
A_OL
100
100
100
100
UNITS
mV
pA
pA
kV/V
dB
µV/V
dB
V
µV/V
dB
V
V
mA
mW
µV/^oC
UNITS
mV
pA
pA
TΩ
kV/V
dB
3
FN1050.6
March 4, 2005