HS-RTX2010RH Datasheet, PDF (29/36 Pages) Intersil Corporation – Radiation Hardened Real Time Express™ Microcontroller

HS-RTX2010RH
designed to help the developers of embedded real-time
control systems get their designs to market quickly. The
environment includes the optimized ANSI C language
compiler, symbolic menu driven C language debugger, RTX
assembler, linker, profiler, and PROM programmer interface.
The HS-RTX2010RH TForth compiler from Intersil translates
Forth-83 source code to HS-RTX2010RH machine
instructions. This compiler also provides support for all of the
HS-RTX2010RH instructions specific to the processor’s
registers, peripherals, and ASIC Bus. See the tables in the
following sections for instruction set information.
TABLE 6. INSTRUCTION SET SUMMARY
NOTATIONS
DEFINITION
m-read
Read data (byte or word) from memory location addressed by contents of _TOP Register into _TOP Register.
m-write
Write contents (byte or word) of _NEXT Register into memory location addressed by contents of _TOP Register.
g-read
Read data from the ASIC address (address field ggggg of instruction) into _TOP Register. A read of one of the on-
chip peripheral registers can be done with a g-read command.
g-write
Write contents of _TOP Register to ASIC address (address field ggggg of instruction). A write to one of the on-chip
peripheral registers can be done with a g-write command.
u-read
Read contents (word only) of User Space location (address field uuuuu of instruction) into _TOP Register.
u-write
Write contents (word only) of _TOP Register into User Space location (address field uuuuu of instruction).
SWAP
Exchange contents of _TOP and _NEXT registers.
DUP
Copy contents of _TOP Register to _NEXT Register, pushing previous contents of _NEXT onto Stack Memory.
OVER
Copy contents of _NEXT Register to _TOP Register, pushing original contents of _TOP to _NEXT Register and
original contents of _NEXT Register to Stack Memory.
DROP
Pop Parameter Stack, discarding original contents of _TOP Register, leaving the original contents of _NEXT in _TOP
and the original contents of the top Stack Memory location in _NEXT .
inv
Perform 1’s complement on contents of _TOP Register, if i bit in instruction is 1.
alu-op
Perform appropriate cccc or aaa ALU operation from Table 20 on contents of _TOP and _NEXT registers.
shift
Perform appropriate shift operation (ssss field of instruction) from Table 21 on contents of _TOP and/or _NEXT
registers.
d
Push short literal d from ddddd field of instruction onto Parameter Stack (where ddddd contains the actual value of the
short literal). The original contents of _TOP are pushed into _NEXT , and the original contents of. _NEXT are pushed
onto Stack Memory.
D
Push long literal D from next sequential location in program memory onto Parameter Stack. The original contents of
TOP ^{are pushed into} NEXT ^{, and the original contents of} NEXT ^{are pushed onto Stack Memory.}
R
Perform a Return From Subroutine if bit = 1.
NOTE: All unused opcodes are reserved for future architectural enhancements.
TABLE 7. INSTRUCTION REGISTER BIT FIELDS (BY FUNCTION)
FUNCTION CODE
DEFINITION
ggggg
Address field for ASIC Bus locations
uuuuu
Address field for User Space memyyory locations
cccc aaa
ALU functions (see Table 20)
ddddd
Short literals (containing a value from 0 to 31)
ssss
Shift Functions (see Table 21)
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