ZL2101_14 Datasheet, PDF (25/27 Pages) Intersil Corporation – 6A Digital Synchronous Step-Down DC/DC Conve with Auto Compensation

ZL2101
TABLE 16. CFG PIN CONFIGURATIONS FOR SEQUENCING AND
TRACKING (Continued)
R_CFG
31.6kΩ
34.8kΩ
38.3kΩ
SYNC PIN
CONFIGURATION
Input
Auto detect
Output
SEQUENCING CONFIGURATION
Device is MIDDLE in nested
sequence. Tracking disabled.
46.4kΩ
51.1kΩ
56.2kΩ
Input
Auto detect
Output
Sequence disabled. Tracking
enabled as defined in Table 13.
The sequencing group will turn on in order starting with the
device with the lowest SMBus address and will continue through
to turn on each device in the address chain until all devices
connected have been turned on. When turning off, the device
with the highest SMBus address will turn off first followed in
reverse order by the other devices in the group.
Sequencing is configured by connecting a resistor from the CFG
pin to ground as described in Table 16. The CFG pin is also used
to set the configuration of the SYNC pin as well as to determine
the sequencing method and order. Please refer to section
“Switching Frequency and PLL” on page 15 for more details on
the operating parameters of the SYNC pin.
Multiple device sequencing may also be achieved by issuing
PMBus commands to assign the preceding device in the
sequencing chain as well as the device that will follow in the
sequencing chain. This method places fewer restrictions on the
SMBus address (no need of sequential address) and also allows
the user to assign any phase offset to any device irrespective of
its SMBus device address.
The Enable pins of all devices in a sequencing group must be tied
together and driven high to initiate a sequenced turn-on of the
group. Enable must be driven low to initiate a sequenced turnoff
of the group. Please refer to Application Note AN2033 for details
on sequencing via the I²C/SMBus interface.
Fault Spreading
Digital-DC devices can be configured to broadcast a fault event
over the DDC bus to the other devices in the group. When a non-
destructive fault occurs and the device is configured to shut down
on a fault, the device will shut down and broadcast the fault
event over the DDC bus. The other devices on the DDC bus will
shut down together if configured to do so, and will attempt to re-
start in their prescribed order if configured to do so.
Monitoring via I²C/SMBus
A system controller can monitor a wide variety of different
ZL2101 system parameters through the I²C/SMBus interface.
The device can monitor for fault conditions by monitoring the
SALRT pin, which will be pulled low when any number of pre-
configured fault conditions occur.
The device can also be monitored continuously for any number of
power conversion parameters including input voltage, output
voltage, output current, internal junction temperature, switching
frequency and duty cycle.
The PMBus host should respond to SALRT as follows:
1. ZL device pulls SALRT low.
2. PMBus host detects that SALRT is now low, performs
transmission with Alert Response Address to find which ZL
device is pulling SALRT low.
3. PMBus host talks to the ZL device that has pulled SALRT low.
The actions that the host performs are up to the system
designer.
If multiple devices are faulting, SALRT will still be low after doing
the above steps and will require transmission with the Alert
Response Address repeatedly until all faults are cleared. Please
refer to Application Note AN2033 for details on how to monitor
specific parameters via the I²C/SMBus interface.
Snapshot™ Parametric Capture
The ZL2101 offers a special feature that enables the user to
capture parametric data during normal operation or following a
fault. The Snapshot functionality is enabled by setting bit 1 of
MISC_CONFIG to 1.
See AN2033 for details on using Snapshot in addition to the
parameters supported. The Snapshot feature enables the user to
read the parameters via a block read transfer through the
SMBus. This can be done during normal operation, although it
should be noted that reading the 22 bytes will occupy the SMBus
for some time.
The SNAPSHOT_CONTROL command enables the user to store
the snapshot parameters to Flash memory in response to a
pending fault as well as to read the stored data from Flash
memory after a fault has occurred.
Table 17 describes the usage of this command. Automatic writes
to Flash memory following a fault are triggered when any fault
threshold level is exceeded, provided that the specific fault’s
response is to shut down (writing to Flash memory is not allowed
if the device is configured to re-try following the specific fault
condition).
It should also be noted that the device’s V_DD voltage must be
maintained during the time when the device is writing the data to
Flash memory; a process that requires between 700µs to
1400µs depending on whether the data is set up for a block
write. Undesirable results may be observed if the device’s V_DD
supply drops below 3.0V during this process.
DATA
VALUE
1
2
TABLE 17. SNAPSHOT_CONTROL COMMAND
DESCRIPTION
Copies current SNAPSHOT values from Flash memory to
RAM for immediate access using SNAPSHOT command.
Writes current SNAPSHOT values to Flash memory. Only
available when device is disabled.
In the event that the device experiences a fault and power is lost,
the user can extract the last SNAPSHOT parameters stored
during the fault by writing a 1 to SNAPSHOT_CONTROL (transfers
data from Flash memory to RAM) and then issuing a SNAPSHOT
command (reads data from RAM via SMBus).
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FN7730.0
January 23, 2012