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ISL6741IVZ-T Datasheet, PDF (23/28 Pages) Intersil Corporation – Flexible Double Ended Voltage and Current Mode PWM Controllers
ISL6740, ISL6741
40
30
20
10
0
-10
-20
10
100
1•103
1•104
1•105
FREQUENCY (Hz)
FIGURE 21A. CONTROL-TO-OUTPUT GAIN
1•106
50
0
-50
-100
-150
-200
10
100
1•103
1•104
1•105
FREQUENCY (Hz)
FIGURE 21B. CONTROL-TO-OUTPUT PHASE
1•106
The Type 3 compensation configuration has three poles and two
zeros. The first pole is at the origin, and provides the integration
characteristic which results in excellent DC regulation. Referring
to the Typical Application Schematic for the regulated output, the
remaining poles and zeros for the compensator are located at:
fp2
=
-------------------1---------------------
2π • R21 • C20
(EQ. 27)
fp3 ≈ 2-----π----•-----R----14-----•----C----2----2--
C19 » C20
(EQ. 28)
fz1 = 2----π-----•-----R----2-1--1-----•-----C----1---9--
(EQ. 29)
fz2 ≈ 2-----π----•-----R----2-1--3-----•-----C----2---2--
R23 » R4
(EQ. 30)
From (Equation 26), it can be seen that the control to output
transfer function frequency dependence is a function of the
output load resistance, the value of output capacitor and
inductor, and the output capacitance ESR. These variations must
be considered when compensating the control loop. The worst
case small signal operating point for a voltage mode converter
tends to be at maximum Vin, maximum load, maximum COUT,
and minimum ESR.
The higher the desired bandwidth of the converter, the more
difficult it is to create a solution that is stable over the entire
operating range. A good rule of thumb is to limit the bandwidth to
about fSW/4, where fSW is the switching frequency of the
converter. However, due to the bandwidth constraints of the opto-
coupler and the LM431 shunt regulator, the bandwidth was
reduced to about 25kHz.
The first pole is placed at the origin by default (C20 is an
integrating capacitor). If the two zeroes are placed at the same
frequency, they should be placed at fLC/2, where fLC is the
resonant frequency of the output L-C filter. To reduce the gain
peaking at the L-C resonant frequency, the two zeroes are often
separated. When they are separated, the first zero may be placed
at fLC/5, and the second at just above fLC. The second pole is
placed at the lowest expected zero cause by the output capacitor
ESR. The third, and last pole is placed at about 1.5 times the
cross over frequency.
Some liberties where taken with the generally accepted
compensation procedure described above due to the transfer
characteristics of the opto coupler. The effects of the opto-
coupler tend to dominate over those of the LM431 so the GBWP
effects of the LM431 are not included here.
The gain and phase characteristics of the opto coupler are shown
in Figure 22A.
10
5
0
-5
-10
-15
-20
10
100
1•103
1•104
1•105
FREQUENCY (Hz)
FIGURE 22A. OPTO COUPLER GAIN
1•106
90
45
0
-45
-90
10
100
1•103
1•104
1•105
FREQUENCY (Hz)
FIGURE 22B. OPTO COUPLER
1•106
23
FN9111.6
December 2, 2011