ISL28110_1012 Datasheet, PDF (23/25 Pages) Intersil Corporation – Precision Low Noise JFET Operational Amplifiers

ISL28110, ISL28210
Package Outline Drawing
L8.3x3A
8 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE
Rev 4, 2/10
3.00
A
B
( 2.30)
( 1.95)
6
PIN 1
INDEX AREA
(4X) 0.15
TOP VIEW
( 2.90 )
(1.50)
( 8X 0.50)
PIN 1
(6x 0.65)
( 8 X 0.30)
TYPICAL RECOMMENDED LAND PATTERN
2X 1.950
PIN #1
1
INDEX AREA
6
6X 0.65
0.75 ±0.05
1.50 ±0.10
SEE DETAIL "X"
0.10 C
C
SIDE VIEW
0.08 C
8X 0.30 ± 0.10
8
2.30 ±0.10
BOTTOM VIEW
23
8X 0.30 ±0.05 ⁴
0.10 M C A B
C
0 . 2 REF
5
0 . 02 NOM.
0 . 05 MAX.
DETAIL "X"
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to ASME Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension applies to the metallized terminal and is measured
between 0.15mm and 0.20mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Compliant to JEDEC MO-229 WEEC-2 except for the foot length.
FN6639.1
December 8, 2010