ISL6256_14 Datasheet, PDF (20/26 Pages) Intersil Corporation – Highly Integrated Battery Charger with Automatic Power Source Selector for Notebook Computers

ISL6256, ISL6256A
TABLE 2. COMPONENT LIST (Continued)
PARTS
PART NUMBERS AND MANUFACTURER
R₁
R₂
R₃
R₄
R₅
R₆
R₇
R₈, R₁₁
R₉
R₁₀
R₁₂
R₁₃
40mΩ, ±1%, LRC-LR2512-01-R040-F, IRC
20mΩ, ±1%, LRC-LR2010-01-R020-F, IRC
18Ω, ±5%, (0805)
2.2Ω, ±5%, (0805)
100kΩ, ±5%, (0805)
4.7k, ±5%, (0805)
100Ω, ±5%, (0805)
130k, ±1%, (0805)
10.2kΩ, ±1%, (0805)
4.7Ω, ±5%, (0805)
20kΩ, ±1%, (0805)
1.87kΩ, ±1%, (0805)
LOOP COMPENSATION DESIGN
ISL6256 has three closed loop control modes. One controls
the output voltage when the battery is fully charged or
absent. A second controls the current into the battery when
charging and the third limits current drawn from the adapter.
The charge current and input current control loops are
compensated by a single capacitor on the ICOMP pin. The
voltage control loop is compensated by a network on the
VCOMP pin. Descriptions of these control loops and
guidelines for selecting compensation components will be
given in the following sections. Which loop controls the
output is determined by the minimum current buffer and the
minimum voltage buffer shown in Figure 1 on page 3. These
three loops will be described separately.
TRANSCONDUCTANCE AMPLIFIERS GM1, GM2 AND
GM3
The ISL6256 uses several transconductance amplifiers (also
known as gm amps). Most commercially available op amps
are voltage controlled voltage sources with gain expressed
as A = V_OUT/V_IN. Transconductance amps are voltage
controlled current sources with gain expressed as
gm = I_OUT/V_IN. Transconductance gain (gm) will appear in
some of the equations for poles and zeros in the
compensation.
PWM GAIN F_M
The Pulse Width Modulator in the ISL6256 converts voltage
at VCOMP to a duty cycle by comparing VCOMP to a
triangle wave (duty = VCOMP/V_{P-P RAMP}). The low-pass
filter formed by L and C_O convert the duty cycle to a DC
output voltage (Vo = V_DCIN*duty). In ISL6256, the triangle
wave amplitude is proportional to V_DCIN. Making the ramp
amplitude proportional to DCIN makes the gain from
VCOMP to the PHASE output a constant 11 and is
independent of DCIN. For small signal AC analysis, the
battery is modeled by it’s internal resistance. The total output
resistance is the sum of the sense resistor and the internal
resistance of the MOSFETs, inductor and capacitor.
Figure 18 shows the small signal model of the pulse width
modulator (PWM), power stage, output filter and battery.
In most cases the Battery resistance is very small (<200mΩ)
resulting in a very low Q in the output filter. This results in a
frequency response from the input of the PWM to the
inductor current with a single pole at the frequency
calculated in Equation 31:
f_POLE1
=
(_---R_{-----S---E----N-----S---E-----+-----}r_{---D----S----(--O----N----)----+-----}R_{----D----C-----R-----+-----}R_{----B----A----T----})
2π ⋅ L
(EQ. 31)
The output capacitor creates a pole at a very high frequency
due to the small resistance in parallel with it. The frequency
of this pole is calculated in Equation 32:
f_POLE2
=
------------------¹--------------------
2π ⋅ C_o ⋅ R_BAT
(EQ. 32)
RAMP GEN
V_RAMP = VDD/11
-
+
PWM
INPUT
VDD
L
CO
PWM
GAIN = 11
L
11
R _{FET_rDS(ON)}
PWM
INPUT
R_SENSE
R_{L_DCR}
CO
R_ESR
FIGURE 18. SMALL SIGNAL AC MODEL
R_BAT
Charge Current Control Loop
When the battery voltage is less than the fully charged
voltage, the voltage error amplifier goes to it’s maximum
output (limited to 1.2V above ICOMP) and the ICOMP
voltage controls the loop through the minimum voltage
buffer. Figure 19 shows the charge current control loop.
20
FN6499.3
September 14, 2010