X9C303_07 Datasheet, PDF (2/10 Pages) Intersil Corporation – Logarithmic Digitally Controlled Potentiometer

X9C303
Ordering Information
PART NUMBER
PART MARKING TEMPERATURE RANGE (°C)
PACKAGE
PKG. DWG. #
X9C303P
X9C303P
0 to +70
8 Ld PDIP
MDP0031
X9C303PI
X9C303P I
-40 to +85
8 Ld PDIP
MDP0031
X9C303PIZ (Note)
X9C303P ZI
-40 to +85
8 Ld PDIP (300 mil) (Pb-free)
MDP0031
X9C303PZ (Note)
X9C303P Z
0 to +70
8 Ld PDIP (300 mil) (Pb-free)
MDP0031
X9C303S8*
X9C303S
0 to +70
8 Ld SOIC (150 mil)
MDP0027
X9C303S8I*
X9C303S I
-40 to +85
8 Ld SOIC (150 mil)
MDP0027
X9C303S8IZ* (Note)
X9C303S ZI
-40 to +85
8 Ld SOIC (150 mil) (Pb-free)
MDP0027
X9C303S8Z* (Note)
X9C303S Z
0 to +70
8 Ld SOIC (150 mil) (Pb-free)
MDP0027
X9C303V8*
9C303
0 to +70
8 Ld TSSOP (4.4mm)
M8.173
X9C303V8I*
C303 I
-40 to +85
8 Ld TSSOP (4.4mm)
M8.173
X9C303V8IZ* (Note)
C303 IZ
-40 to +85
8 Ld TSSOP (4.4mm) (Pb-free)
M8.173
X9C303V8Z* (Note)
9CC303 Z
0 to +70
8 Ld TSSOP (4.4mm) (Pb-free)
M8.173
X9C303S8I-2.7
X9C303S G
-40 to +85
8 Ld SOIC (150 mil)
MDP0027
X9C303S8IZ-2.7 (Note) X9C303S ZG
-40 to +85
8 Ld SOIC (150 mil) (Pb-free)
MDP0027
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
*Add "T1" suffix for tape and reel.
Pin Descriptions
V_H and V_L
The high (V_H) and low (V_L) terminals of the device are
equivalent to the fixed terminals of a mechanical
potentiometer. The minimum voltage is –5V and the
maximum is +5V. It should be noted that the terminology of
V_L and V_H references the relative position of the terminal in
relation to wiper movement direction selected by the U/D
input and not the voltage potential on the terminal.
V_W
V_W is the wiper terminal, equivalent to the movable terminal
of a mechanical potentiometer. The position of the wiper
within the array is determined by the control inputs. The
wiper terminal series resistance is typically 40Ω.
Up/Down (U/D)
The U/D input controls the direction of the wiper movement
and whether the counter is incriminated or decremented.
Increment (INC)
The INC input is negative-edge triggered. Toggling INC will
move the wiper and either increment or decrement the
counter in the direction indicated by the logic level on the
U/D input.
Chip Select (CS)
The device is selected when the CS input is LOW. The
current counter value is stored in nonvolatile memory when
CS is returned HIGH while the INC input is also HIGH. After
the store operation is complete the device will be placed in
the low power standby mode until the device is selected
once again.
Pinout
X9C303
(8 LD SOIC, 8 LD TSSOP, 8 LD PDIP)
TOP VIEW
(CS) INC
(V_CC) U/D
(INC) V_H
(U/D) _VSS
1
8
2
7
X9C303
3
6
4
5
V_CC ^(VL⁾
CS (V_W)
V_L (VSS)
V_W ^(VH⁾
Pin Names
SYMBOL
VH
VW
VL
VSS
VCC
U/D
INC
CS
NC
DESCRIPTION
High Terminal (Potentiometer)
Wiper Terminal (Potentiometer)
Low Terminal (Potentiometer)
Ground
Supply Voltage
Up/Down Control Input
Increment Control Input
Chip Select Control Input
No Connection
2
FN8223.1
January 24, 2007