ISL6844 Datasheet, PDF (2/10 Pages) Intersil Corporation – ISL6844 Reference Design: ISL6844EVAL3Z

Application Note 1612
ILM
TSW
Ipk
dTSW
d2TSW
d3TSW
MOSFET ON
MOSFET OFF MOSFET OFF
Ipri
DIODES (D1 AND DIODES (D1 AND DIODES (D1
D2) OFF
D2) ON
AND D2) OFF
Ipk
Isec,1
Isec,2
<Iout,1>
<Iout,2>
FIGURE 2. TYPICAL OPERATIONAL CURRENT WAVEFORMS
Transformer Core Selection
From Figure 2, the RMS current in the transformer primary side
can be calculated from:
I_{rms, pri} = I_pk ⋅
d_--
3
= 1.06 ⋅ ⁰----^.--³---⁵--= 0.362A
3
(EQ. 3)
The RMS current in each transformer secondary side can also be
computed from:
I_{rms, sec}
=
I_{--p----k- â‹}
2
-^d---²-
3
=
1_----._--0_---6_--
2
⋅
0_----._--5_{- ⋅ = 0.216A}
3
(EQ. 4)
The transformer used in this design is Pulse’s PA3374Nl. It is a
gapped ferrite toroid core, which has the following parameters:
• A_e = 4.3mm²
• A_L = 35nH/n²
• l_e = 13.1mm
• V_e = 56.5mm³
This section provides general guideline to calculate the number
of turn and wire size. For more details on designing transformer
parameters, please contact a Pulse representative.
The number of turns on the primary side, Np, can be determined
from:
N_p =
L_----[_---u_----H_----]_----×_-----1_---0_---0_----0_-
A_L
= -²---³---^.--⁸-----^×----¹----⁰---⁰----⁰- = 26.07
35
(EQ. 5)
Therefore, the primary side has 26 turns. With the turn ratio of 1,
the secondary side and the auxiliary primary side also have 26
turns.
Next the calculate the maximum flux density to make sure that it
is below the saturation limit.Where:
B_max
=
L_----M------⋅_---I_{--M----,---m-----a---x-}
N_p ⋅ A_e
=
-²---³---^.--⁸----^×---1---0---^–---⁶----^â‹---¹----^.-⁰----⁶-
26 ⋅ 4.3×10^–2
×10⁴
=
0.226 T
(EQ. 6)
For the operating power level, the wire sizes of the primary,
secondary, and auxiliary windings are selected such that the
current density in each winding is about 0.25335 cm²/A (50
circular mil/A).
A_{w, pri} ≥ 0.25335 ⋅ 0.362= 0.0917cm²
(EQ. 7)
To simplify transformer winding, AWG#37 is used for all primary,
secondary and auxiliary windings.
Primary MOSFET Selection
The primary MOSFET needs to be able to handle the voltage
stress, given by:
V_DSFET = V_{IN, MAX} + [n × (V_out + V_f)]
= 26.4 + [1 × (15 + 0.6)]= 42V
(EQ. 8)
As a good design practice, some margin is provided to this peak
stress voltage to accommodate transient spikes and for a good
reliable performance over time. Providing a 30% design margin
as a rule of thumb, the minimum rating on the primary MOSFET
needs to be 54.6V.
2
AN1612.1
November 28, 2011