ISL28110_11 Datasheet, PDF (2/25 Pages) Intersil Corporation – Precision Low Noise JFET Operational Amplifiers

ISL28110, ISL28210
Pin Configurations
ISL28110
(8 LD TDFN)
TOP VIEW
NC ₁
-IN A 2
+IN A 3
V_- 4
-+
PAD
8 ^NC
7 V₊
6 V_OUT A
5 NC
ISL28110
(8 LD, SOIC, MSOP)
TOP VIEW
NC 1
-IN A 2
-+
+IN A 3
V_- 4
8 NC
7 V₊
6 V_OUT A
5 NC
ISL28210
(8 LD TDFN)
TOP VIEW
V_OUT A ₁
-IN A 2
+IN A 3
V_- 4
-+
+-
PAD
8 ^V+
7 V_OUT B
6 -IN B
5 +IN B
ISL28210
(8 LD SOIC)
TOP VIEW
V_OUT A 1
8 V₊
-IN A 2 - +
7 V_OUT B
+IN A 3
+ - ^{6 -IN B}
V_- 4
5 +IN B
Pin Descriptions
ISL28110
(8 LD TDFN)
3
2
6
4
7
1, 5, 8
PAD
ISL28110
(8 LD SOIC,
8 LD MSOP)
3
2
6
4
7
1, 5, 8
ISL28210
(8 LD TDFN)
3
2
1
4
5
6
7
8
PAD
ISL28210
(8 LD SOIC)
3
2
1
4
5
6
7
8
PIN
NAME
+IN A
-IN A
V_OUT A
V_-
+IN B
-IN B
V_OUT B
V₊
PAD
V₊
IN-
IN+
V_-
CIRCUIT 1
V₊
OUT
V_-
CIRCUIT 2
EQUIVALENT
CIRCUIT
Circuit 1
Circuit 1
Circuit 2
Circuit 3
Circuit 1
Circuit 1
Circuit 2
Circuit 3
DESCRIPTION
Amplifier A non-inverting input
Amplifier A inverting input
Amplifier A output
Negative power supply
Amplifier B non-inverting input
Amplifier B inverting input
Amplifier B output
Positive power supply
No connect
Thermal Pad is electrically isolated from
active circuitry. Pad can float, connect to
Ground or to a potential source that is
free from signals or noise sources.
V₊
CAPACITIVELY
TRIGGERED
ESD CLAMP
V_-
CIRCUIT 3
2
FN6639.2
September 14, 2011