ISL22446 Datasheet, PDF (2/15 Pages) Intersil Corporation – Quad Digitally Controlled Potentiometer XDCP

ISL22446
Block Diagram
SCK
SDI
SDO
CS
SPI
INTERFACE
V_CC
POWER UP
INTERFACE,
CONTROL
AND STATUS
LOGIC
SHDN
NON-
VOLATILE
REGISTERS
WR3
WR2
WR1
WR0
RH3
RW3
RL3
RH2
RW2
RL2
RH1
RW1
RL1
RH0
RW0
RL0
GND
Pin Descriptions
TSSOP PIN
NUMBER
1
2
3
4
5
6
7
8
9
10
11
12
13
14
TQFN PIN
NUMBER
3
4
5
6
7
8
9
10
11
12
13
14
15
16
SYMBOL
RH3
RL3
RW3
NC
SCK
SDO
GND
RW2
RL2
RH2
RW1
RL1
RH1
CS
DESCRIPTION
“High” terminal of DCP3
“Low” terminal of DCP3
“Wiper” terminal of DCP3
No connect
SPI clock input
SPI Open drain Data Output
Device ground pin
“Wiper” terminal of DCP2
“Low” terminal of DCP2
“High” terminal of DCP2
“Wiper” terminal of DCP1
“Low” terminal of DCP1
“High” terminal of DCP1
SPI Chip Select active low input
15
17
SDI
SPI Data Input
16
18
VCC
Power supply pin
17
19
SHDN
Shutdown active low input
18
20
RH0
“High” terminal of DCP0
19
1
RL0
“Low” terminal of DCP0
20
2
RW0
“Wiper” terminal of DCP0
EPAD*
Exposed Die Pad internally connected to GND
*NOTE: PCB thermal land for QFN EPAD should be connected to GND plane or left floating. For more information refer to
http://www.intersil.com/data/tb/TB389.pdf
2
FN6181.2
September 9, 2009