ISL22346_09 Datasheet, PDF (2/16 Pages) Intersil Corporation – Quad Digitally Controlled Potentiometers

ISL22346
Ordering Information
PART NUMBER
(Note)
PART
MARKING
RESISTANCE OPTION
(kΩ)
TEMP. RANGE
(°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL22346UFV20Z*
22346 UFVZ
50
-40 to +125
20 Ld TSSOP
M20.173
ISL22346UFRT20Z*
223 46UFZ
50
-40 to +125
20 Ld 4x4 TQFN
L20.4x4A
ISL22346WFV20Z*
22346 WFVZ
10
-40 to +125
20 Ld TSSOP
M20.173
ISL22346WFRT20Z*
223 46WFZ
10
-40 to +125
20 Ld 4x4 TQFN
L20.4x4A
*Add “-TK” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Block Diagram
V_CC
SCL
SDA
A0
A1
A2
I²C
INTERFACE
SHDN
POWER-UP
INTERFACE,
CONTROL
AND STATUS
LOGIC
NON-
VOLATILE
REGISTERS
WR3
WR2
WR1
WR0
RH3
RW3
RL3
RH2
RW2
RL2
RH1
RW1
RL1
RH0
RW0
RL0
GND
Pin Descriptions
TSSOP PIN
NUMBER
1
2
3
4
5
6
7
8
9
10
11
12
13
14
TQFN PIN
NUMBER
3
4
5
6
7
8
9
10
11
12
13
14
15
16
PIN NAME
RH3
RL3
RW3
A2
SCL
SDA
GND
RW2
RL2
RH2
RW1
RL1
RH1
A0
DESCRIPTION
“High” terminal of DCP3
“Low” terminal of DCP3
“Wiper” terminal of DCP3
Device address input for the I²C interface
Open drain I²C interface clock input
Open drain Serial data I/O for the I²C interface
Device ground pin
“Wiper” terminal of DCP2
“Low” terminal of DCP2
“High” terminal of DCP2
“Wiper” terminal of DCP1
“Low” terminal of DCP1
“High” terminal of DCP1
Device address input for the I²C interface
2
FN6177.2
September 3, 2009