HI5800_00 Datasheet, PDF (2/15 Pages) Intersil Corporation – 12-Bit, 3MSPS, Sampling A/D Converter

Functional Block Diagram
HI5800
REF_OUT
REF_IN
REFERENCE
ADJ+
ADJ-
V_IN
S AND H
7-BIT
FLASH
7-BIT
LATCH
7-BIT
LATCH
7-BIT
DAC
X32
CONTROL
LOGIC
AND
TIMING
D0 (LSB)
D1
D2
DIGITAL
OUTPUTS
D10
D11 (MSB)
OVF
IRQ
CS
CONV
OE
AO
AV_CC AV_EE DV_CC DV_EE AGND DGND
RG_ADJ RO_ADJ
Typical Application Schematic
C23
C22
C1
+10µF
0.1µF
0.01µF
V_IN
CONV
OE
A0
CS
HI5800
(22) (LSB) D0
(23) D1
REF_IN (1)
REF_OUT (5)
AGND (7)
AGND (12)
AGND (31)
DGND (19)
DGND (32)
(24) D2
(25) D3
(26) D4
(27) D5
(28) D6
(29) D7
(34) D8
(35) D9
V_IN (6)
(36) D10
(37) (MSB) D11
CONV (17)
OE (16)
A0 (14)
CS (15)
(40) IRQ
(39) OVF
(18) DV_EE
(33) DV_CC
(20)
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
IRQ
OVF
BNC
GND
10µF, 0.1µF, AND 0.01µF CAPS ARE PLACED
AS CLOSE TO PART AS POSSIBLE
0.1µF
+
10µF
0.1µF ₊₁₀µF
AV_CC
R9
10K
R10
10K
AV_EE
R11
10K
RO_ADJ (2)
RG_ADJ (3)
(4) AV_CC
(11)
(21) AV_CC
(38)
ADJ+ (8)
ADJ- (9)
(10) AV_EE
(13) (30)
0.1µF ₊₁₀µF
0.1µF
+
10µF
4-2